[PATCH] D89909: [SYCL] Implement SYCL address space attributes handling

[Alexey Bader via Phabricator via cfe-commits]

bader added a comment.

Let's take a look at compilation output for the following program:

  c++
  void foo(int *p) {}

OpenCL compiler produces following LLVM IR for SPIR target:

  LLVM
  define dso_local spir_func void @_Z3fooPU3AS4i(i32 addrspace(4)* nocapture %0) local_unnamed_addr #0 {
    ret void
  }

Here is what SYCL device compiler produces:

  LLVM
  define dso_local spir_func void @_Z3fooPi(i32* nocapture %0) local_unnamed_addr #0 {
    ret void
  }

We would like to get equivalent code produced by both compiler for SPIR target.
Currently SYCL device compiler emits pointer to address space 0 instead of expected 4. This lowering is defined by the address space map.
Having multiple maps is not something new to the clang community. Similar approach AMDGPU target applies to customize address space mapping for OpenCL language (https://github.com/llvm/llvm-project/blob/main/clang/lib/Basic/Targets/AMDGPU.cpp#L354).

I updated address space map names to avoid confusion that mapping change is specific to the language mode. Now they use the same naming scheme as AMDGPU maps.

Using InferAddressSpace pass is not required for the targets supporting SPIR-V with pointers to generic address space, but it can be beneficial to produce more efficient native code.

I also created a review request with SYCL design documentation - https://reviews.llvm.org/D99190


Repository:
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https://reviews.llvm.org/D89909