[PATCH] D99158: [RISCV][WIP] Implement intrinsics for P extension

Jim Lin via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Mar 23 02:14:41 PDT 2021


Jim created this revision.
Jim added reviewers: craig.topper, khchen, HsiangKai, jrtc27, luismarques.
Herald added subscribers: vkmr, frasercrmck, evandro, apazos, sameer.abuasal, s.egerton, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, fedor.sergeev, krytarowski.
Jim requested review of this revision.
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Herald added projects: clang, LLVM.

It introduces a new macro specified type "e" for function argument.
"e", followed by the base type and its vector type width is the same as the register size,
is used to specify the argument with the certain base type but its element size depends
on XLen. For example, vector type with base type i8 is v4i8 on RV32 and v8i8 on RV64.

It doesn't include RV64 only intrinsics.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99158

Files:
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/Basic/Builtins.def
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/AST/ASTContext.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-riscv-rv32p.c
  clang/test/CodeGen/builtins-riscv-rv64p.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoP.td
  llvm/test/CodeGen/RISCV/intrinsics-rv32p.ll
  llvm/test/CodeGen/RISCV/intrinsics-rv64p.ll

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