[PATCH] D92815: [PowerPC] [Clang] Enable float128 feature on VSX targets

Qiu Chaofan via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Mar 2 01:04:17 PST 2021


qiucf updated this revision to Diff 327378.
qiucf retitled this revision from "[PowerPC] [Clang] Enable float128 feature on Altivec targets" to "[PowerPC] [Clang] Enable float128 feature on VSX targets".
qiucf edited the summary of this revision.
qiucf set the repository for this revision to rG LLVM Github Monorepo.
qiucf added a comment.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Align with GCC, enable float128 for VSX and later subtargets.

But besides, GCC can enable it by `-mcpu=power6 -mvsx`, this revision did not do it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92815/new/

https://reviews.llvm.org/D92815

Files:
  clang/lib/Basic/Targets/PPC.cpp
  clang/test/Driver/ppc-f128-support-check.c


Index: clang/test/Driver/ppc-f128-support-check.c
===================================================================
--- clang/test/Driver/ppc-f128-support-check.c
+++ clang/test/Driver/ppc-f128-support-check.c
@@ -2,13 +2,17 @@
 // RUN:   -mcpu=pwr9 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
 // RUN:   -mcpu=power9 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
-
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=pwr8 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   -mcpu=pwr8 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr7 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
+
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=pwr7 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   -mcpu=pwr6 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   -mno-vsx -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
 
 #ifdef __FLOAT128__
 static_assert(false, "__float128 enabled");
Index: clang/lib/Basic/Targets/PPC.cpp
===================================================================
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -322,6 +322,12 @@
                         .Case("pwr9", true)
                         .Case("pwr8", true)
                         .Default(false);
+  Features["float128"] = llvm::StringSwitch<bool>(CPU)
+                             .Case("ppc64le", true)
+                             .Case("pwr9", true)
+                             .Case("pwr8", true)
+                             .Case("pwr7", true)
+                             .Default(false);
 
   // ROP Protection is off by default.
   Features["rop-protection"] = false;
@@ -348,9 +354,9 @@
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
     return false;
 
-  if (!(ArchDefs & ArchDefinePwr9) && (ArchDefs & ArchDefinePpcgr) &&
+  if (!(ArchDefs & ArchDefinePwr7) && (ArchDefs & ArchDefinePpcgr) &&
       llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) {
-    // We have __float128 on PPC but not power 9 and above.
+    // We have __float128 on PPC but not pre-VSX targets and above.
     Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
     return false;
   }
@@ -446,8 +452,8 @@
     if ((Name == "altivec") || (Name == "vsx"))
       Features["vsx"] = Features["direct-move"] = Features["power8-vector"] =
           Features["float128"] = Features["power9-vector"] =
-              Features["paired-vector-memops"] = Features["mma"] =
-                  Features["power10-vector"] = false;
+              Features["float128"] = Features["paired-vector-memops"] =
+                  Features["mma"] = Features["power10-vector"] = false;
     if (Name == "power8-vector")
       Features["power9-vector"] = Features["paired-vector-memops"] =
           Features["mma"] = Features["power10-vector"] = false;


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