[PATCH] D97264: [RISCV] Define types for Zvlsseg.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai marked 3 inline comments as done.
HsiangKai added inline comments.


================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:10672
 
+  if (Ty->isRecordType() && !Ty->getAsRecordDecl()->field_empty() &&
+      Ty->getAsRecordDecl()->field_begin()->getType()->isSizelessType())
----------------
craig.topper wrote:
> Are we able to test this yet?
No, I removed it.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D97264/new/

https://reviews.llvm.org/D97264