[PATCH] D97053: [clang][SVE] Don't warn on vector to sizeless builtin implicit conversion

Mon Feb 22 05:12:03 PST 2021

c-rhodes added a comment.

In D97053#2575791 <https://reviews.llvm.org/D97053#2575791>, @craig.topper wrote:

> Is this change specific to fixed vectors declared with arm_sve_vector_bits or any of the subclasses of VectorType? If it allows the others, how do we know for sure that there are enough bits in the scalable type for the fixed vector. I ask because RISCV is also using sizeless builtin types for our vectors as of D92715 <https://reviews.llvm.org/D92715>.

Thanks for pointing out that out Craig, I wasn't aware RISCV is also using sizeless builtins now, I hadn't considered that.

================
Comment at: clang/lib/Sema/SemaChecking.cpp:12055
+  if (auto *SourceVT = dyn_cast<VectorType>(Source)) {
+    if (Target->isSizelessBuiltinType()) {
+      auto SourceVectorKind = SourceVT->getVectorKind();
----------------
I suppose we could tighten this further by replacing `isSizelessBuiltinType` with `isVLSTBuiltinType`

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97053/new/

https://reviews.llvm.org/D97053