[PATCH] D96265: [PowerPC] Change target data layout for 16-byte stack alignment

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai requested changes to this revision.
nemanjai added a comment.
This revision now requires changes to proceed.

Can you please merge the tests into one file. There is no compelling reason to split them up and it is more difficult to review and make sense of what is going on. The test case should have:

1. A function that allocates a 32-byte vector (i.e. defined with `__attribute__((vector_size(32)))`)
2. A function that allocates a 32-byte aligned vector (i.e. defined with `__attribute__((aligned(32)))`)
3. A function that allocates an array that wouldn't be aligned to something in excess of stack alignment but gets over-aligned due to vectorization

You can achieve 3. above with something like this:

  $ cat t.c
  char Arr1[64];
  void test(short *);
  void cpy() {
    short Arr2[64];
    for (int i = 0; i < 64; i++)
      Arr2[i] = Arr1[i];
    test(Arr2);
  }
  
  clang -O3 -S t.c -emit-llvm -Xclang -disable-llvm-passes

Then the test case should run something like the following:
`opt --passes=sroa,loop-vectorize,loop-unroll,instcombine t.ll -S -o t.opt.ll -vectorizer-maximize-bandwidth --mtriple=powerpc64le--`
And check the alignment of the `alloca` and vector store. They should be 16 and not 32 even though the vector is 32 bytes wide.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96265/new/

https://reviews.llvm.org/D96265