[PATCH] D93298: [RISCV] add the MC layer support of Zfinx extension

luxufan via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Feb 5 02:42:17 PST 2021


StephenFan added a comment.

In D93298#2544443 <https://reviews.llvm.org/D93298#2544443>, @asb wrote:

> I started reviewing this alongside the specification in https://github.com/riscv/riscv-zfinx/blob/master/Zfinx_spec.adoc. At the time of writing, it seems to define "zfinx" but not "zfhinx" and "zfdinx" as seem to be used in this patch. I think intent is that rv32ifd_zfinx is the equivalent of "zfdinx" in this patch. Is there a reason to go for different naming, or a different version of the spec I should be looking at?

According to  @jrtc27 's review that is 
"As for Zfinx itself, well, the idea is fine, but I really detest the way it's being done as an extension to F/D/Zfh. Running F code on an FZfh core _does not work_ so it is not an _extension_. Instead it should really be a set of separate extensions to I/E that conflict with F/D/Zfh, i.e. Zfinx, Zdinx and Zfhinx, but apparently asking code that complies with a ratified standard to change itself in order to not break when a new extension is introduced is a-ok in the RISC-V world.". 
We split the Zfinx into 3 separate extensions which is Zfinx, Zdinx, and Zfhinx.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93298/new/

https://reviews.llvm.org/D93298



More information about the cfe-commits mailing list