[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jan 25 12:50:54 PST 2021
craig.topper added a comment.
I wonder if these types should be prefixed with "__clang_" like AArch64 tuple types?
================
Comment at: clang/lib/AST/ASTContext.cpp:3875
+ IsFP) \
+ if (!EltTy->isBooleanType() && \
+ ((EltTy->hasIntegerRepresentation() && \
----------------
Should this be indented 2 more spaces? to align with the uin64_t above?
================
Comment at: clang/lib/AST/ASTContext.cpp:3882
+#define RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) \
+ if (EltTy->isBooleanType() && NumElts == NumEls) \
+ return SingletonId;
----------------
Same here
================
Comment at: clang/lib/CodeGen/CGDebugInfo.cpp:784
+ // Mask type only occupies one vector register.
+ if (Info.ElementType == CGM.getContext().BoolTy) {
+ Fractional = false;
----------------
Put this above the "if (FixedSize < 64)" and make that an "else if" so all assignments are in the same if/else structure.
You could pre-initialize Fractional to false and only assign it to true in the if/else chain.
================
Comment at: clang/test/CodeGen/RISCV/riscv-v-debuginfo.c:1
+// RUN: %clang_cc1 -triple riscv64 -target-feature +experimental-v \
+// RUN: -dwarf-version=4 -debug-info-kind=limited -emit-llvm -o - %s \
----------------
This seems to be dependent on the patch that adds the vadd builtins?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D92715/new/
https://reviews.llvm.org/D92715
More information about the cfe-commits
mailing list