[PATCH] D91784: [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines
Luís Marques via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Nov 24 14:51:18 PST 2020
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG28de0fb4863a: [RISCV] Set __GCC_HAVE_SYNC_COMPARE_AND_SWAP_x defines (authored by luismarques).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91784/new/
https://reviews.llvm.org/D91784
Files:
clang/lib/Basic/Targets/RISCV.cpp
Index: clang/lib/Basic/Targets/RISCV.cpp
===================================================================
--- clang/lib/Basic/Targets/RISCV.cpp
+++ clang/lib/Basic/Targets/RISCV.cpp
@@ -115,8 +115,14 @@
Builder.defineMacro("__riscv_muldiv");
}
- if (HasA)
+ if (HasA) {
Builder.defineMacro("__riscv_atomic");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+ if (Is64Bit)
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+ }
if (HasF || HasD) {
Builder.defineMacro("__riscv_flen", HasD ? "64" : "32");
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