[PATCH] D89684: [AIX] Add mabi=vec-extabi options to enable the AIX extended and default vector ABIs.
Zarko Todorovski via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Nov 24 10:33:46 PST 2020
ZarkoCA marked 7 inline comments as done.
ZarkoCA added inline comments.
================
Comment at: clang/test/CodeGen/altivec.c:7
+
+// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-extabi -target powerpc-unknown-aix %s -o - | FileCheck %s
+// RUN: not %clang -S -emit-llvm -mabi=vec-default -target powerpc-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ATVER
----------------
Xiangling_L wrote:
> When user specify `-maltivec / -target-feature +altivec` without using any abi option, the compiler will assume default altivec abi. In this situation, since default abi hasn’t been implemented, we should emit an error. So can we also add testcases for :
>
> ```
> // RUN: not %clang -S -emit-llvm -maltivec -target powerpc-unknown-aix %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
> and
> // RUN: not %clang_cc1 -target-feature +altivec -triple powerpc-unknown-aix -emit-llvm %s 2>&1 | FileCheck %s --check-prefix=AIX-ERROR
> ```
That's a good catch, the error was able to be generated previously but reworking the logic in Clang.cpp with the previous diff caused it to not be emitted. I went back to the older logic which emits the error in cases like where `maltivec` is specified without `mabi=vec-extabi`.
As for the cc1 error, currently the not vector types error catch that before we emit the Altivec ABI error since at this time there isn't a good way to check for `target-feature +altivec` in cc1.
================
Comment at: llvm/test/CodeGen/PowerPC/aix-vec-abi.ll:1
+; RUN: not --crash llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s --check-prefix=DFLTERROR
+; RUN: not --crash llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s --check-prefix=DFLTERROR
----------------
Xiangling_L wrote:
> May I ask why we use `pwr8` for this test?
Sorry for missing this earlier, I wanted to specify a CPU that has Altivec instructions enabled so that hasAltivec true without the user specifying it.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D89684/new/
https://reviews.llvm.org/D89684
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