[clang] 6e0ae20 - [VE] Support vector register in inline asm

[Kazushi Marukawa via cfe-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-11-12T06:18:35+09:00
New Revision: 6e0ae20f3b98b7bb5a44ced22c3da42a8fe5dbc8

URL: https://github.com/llvm/llvm-project/commit/6e0ae20f3b98b7bb5a44ced22c3da42a8fe5dbc8
DIFF: https://github.com/llvm/llvm-project/commit/6e0ae20f3b98b7bb5a44ced22c3da42a8fe5dbc8.diff

LOG: [VE] Support vector register in inline asm

Support a vector register constraint in inline asm of clang.
Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91251

Added: 
    clang/test/CodeGen/VE/ve-inline-asm.c

Modified: 
    clang/lib/Basic/Targets/VE.h

Removed: 
    


################################################################################
diff  --git a/clang/lib/Basic/Targets/VE.h b/clang/lib/Basic/Targets/VE.h
index f863a0af0acb6..b8143747a38dd 100644
--- a/clang/lib/Basic/Targets/VE.h
+++ b/clang/lib/Basic/Targets/VE.h
@@ -160,6 +160,13 @@ class LLVM_LIBRARY_VISIBILITY VETargetInfo : public TargetInfo {
 
   bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &Info) const override {
+    switch (*Name) {
+    default:
+      return false;
+    case 'v':
+      Info.setAllowsRegister();
+      return true;
+    }
     return false;
   }
 

diff  --git a/clang/test/CodeGen/VE/ve-inline-asm.c b/clang/test/CodeGen/VE/ve-inline-asm.c
new file mode 100644
index 0000000000000..b3ee14407c9b5
--- /dev/null
+++ b/clang/test/CodeGen/VE/ve-inline-asm.c
@@ -0,0 +1,23 @@
+// REQUIRES: ve-registered-target
+// RUN: %clang_cc1 -triple ve-linux-gnu -emit-llvm -o - %s | FileCheck %s
+
+void r(long v) {
+  long b;
+  asm("lea %0, 256(%1)"
+      : "=r"(b)
+      : "r"(v));
+  // CHECK: %1 = call i64 asm "lea $0, 256($1)", "=r,r"(i64 %0)
+}
+
+void v(char *ptr, char *ptr2) {
+  typedef double __vr __attribute__((__vector_size__(2048)));
+  __vr a;
+  asm("vld %0, 8, %1"
+      : "=v"(a)
+      : "r"(ptr));
+  asm("vst %0, 8, %1"
+      :
+      : "v"(a), "r"(ptr2));
+  // CHECK: %1 = call <256 x double> asm "vld $0, 8, $1", "=v,r"(i8* %0)
+  // CHECK: call void asm sideeffect "vst $0, 8, $1", "v,r"(<256 x double> %2, i8* %3)
+}