[PATCH] D90765: [ARM][AArch64] Adding Neoverse V1 CPU support

Dave Green via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Nov 4 10:57:22 PST 2020


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:198
     break;
+  case NeoverseV1:
+    PrefFunctionLogAlignment = 4;
----------------
Please put with the other cpus above.


================
Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.h:75
+    ThunderX3T110,
+    NeoverseV1,
   };
----------------
Alphabetical I think (but at least next to the NeoverseN1)


================
Comment at: llvm/lib/Target/ARM/ARM.td:604
 
+def ProcNeoverseV1 : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
+                                      "NeoverseV1", "Neoverse-V1 ARM processors", []>;
----------------
The convention would be for ProcV1


================
Comment at: llvm/lib/Target/ARM/ARMSubtarget.cpp:324
     break;
+  case NeoverseV1:
+    break;
----------------
With N1


================
Comment at: llvm/lib/Target/ARM/ARMSubtarget.h:80
+    Swift,
+    NeoverseV1,
   };
----------------
Alphabetical, I think.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90765/new/

https://reviews.llvm.org/D90765



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