[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

Eric Astor via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Nov 4 05:38:29 PST 2020


epastor added inline comments.


================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:2851
+    // Parse MASM style pseudo prefixes.
+    // FIXME: This prefix should only be used for MASM, not for intel-syntax.
+    if (isParsingIntelSyntax()) {
----------------
LiuChen3 wrote:
> I tried to limit to MASM. But I found that the  'isParsingMSInlineAsm()' is not accurate.  And then I tried to transmit 'ParsingMSInlineAsm' information correctly in AsmPrinterInlineAsm.cpp (according to the '-fasm-blocks' option). But I was surprised to find that isParsingMSInlineAsm() is actually used as the argument of 'MatchingInlineAsm' in 'MatchAndEmitInstruction()'. This makes me confused. Should that 'MatchingInlineAsm' be 'MatchingMSInlineAsm' ?Is this MatchingInlineAsm only used by llvm-ml.
> It difficult to limit this to MASM at the moment. 
llvm-ml attempts not to touch **anything** involving inline assembly so far. The signal that MasmParser.cpp is involved is `Parser.isParsingMasm()`. However... while I can't answer the majority of this without more research, I suspect you're correct that `MatchingInlineAsm` is misnamed. We need to check this, and if so, we should rename it to avoid confusion.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90441/new/

https://reviews.llvm.org/D90441



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