[PATCH] D72184: [WIP][BPF] support exchange/compare-and-exchange instruction

[Alexei Starovoitov via Phabricator via cfe-commits]

ast added inline comments.


================
Comment at: llvm/lib/Target/BPF/BPFInstrInfo.td:715
+
+let Predicates = [BPFHasAtomicExt, BPFHasALU32], DecoderNamespace = "BPFALU32" in {
+  def XFADDW32 : XFALU32<BPF_W, BPF_ADD, "u32", "add", atomic_load_add_32>;
----------------
i think -mcpu=v4 should include alu32.
Otherwise the test matrix will keep increasing. It's already time consuming to test v1,v2,v3.
If v4 would mean with and without alu32 that would stay this way for long time and any further extensions
would be doubling the test matrix further.


================
Comment at: llvm/lib/Target/BPF/BPFInstrInfo.td:830
+
+    let Predicates = [BPFHasAtomicExt] in {
+      def CMPXCHGD : CMPXCHG<BPF_DW, "64", atomic_cmp_swap_64>;
----------------
let Defs = [R0], Uses = [R0]
and BPFISelLowering would need to do getCopyToReg+cmpxchg+getCopyFromReg similar to X86ISelLowering ?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D72184/new/

https://reviews.llvm.org/D72184