[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM
Pengfei Wang via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Oct 29 20:54:36 PDT 2020
pengfei added inline comments.
================
Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o - | FileCheck %s -check-prefix CHECK
+
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Maybe need `// REQUIRES: x86-registered-target`
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Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o - | FileCheck %s -check-prefix CHECK
+
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pengfei wrote:
> Maybe need `// REQUIRES: x86-registered-target`
You may need add att check too since you modified the att code.
================
Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o - | FileCheck %s -check-prefix CHECK
+
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pengfei wrote:
> pengfei wrote:
> > Maybe need `// REQUIRES: x86-registered-target`
> You may need add att check too since you modified the att code.
Should it be avalible only when `-fms-compatibility`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90441/new/
https://reviews.llvm.org/D90441
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