[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

[LiuChen via Phabricator via cfe-commits]

LiuChen3 added inline comments.


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Comment at: clang/test/CodeGen/X86/att-inline-asm-prefix.c:14
+    "{vex2} vcvtps2pd %xmm0, %xmm1\n\t"
+    "{vex3} vcvtps2pd %xmm0, %xmm1\n\t"
+    "{evex} vcvtps2pd %xmm0, %xmm1\n\t"
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> Does this bug only effect the printing of inline assembly to a .s file? 

Yes. Using "-c" to out .o file directly will get right encoding.

But if we firstly output the .s file and then compile it, the end encoding is wrong. For this example, it will all be two-byte vex prefix.


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Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896
+    // encoder.
     Prefixes |= X86::IP_USE_VEX3;
+    Prefixes |= X86::Force_VEX3Encoding;
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craig.topper wrote:
> Why do we need Force_VEX3Encoding and IP_USE_VEX3?
I think this will make all of IP_USE_VEX3 the 3-byte vex prefix instruction output with {vex3}. The IP_USE_VEX3 is for encoder.


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https://reviews.llvm.org/D90009