[PATCH] D86819: [PowerPC][Power10] Implementation of 128-bit Binary Vector Rotate builtins

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

The remaining requests can be fulfilled when committing. I don't think this requires another review. Thanks.



================
Comment at: clang/lib/Headers/altivec.h:7865
+#endif
+  return __builtin_altivec_vrlqnm(__a, MaskAndShift);
+}
----------------
Please add explicit cast to `vector unsigned __int128` for `MaskAndShift`. Similarly below. I forgot to add that to my comment.


================
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:996
+  // CHECK-COMMON-LABEL: @test_vec_rlnm_s128(
+  // CHECK-COMMON: call <1 x i128> @llvm.ppc.altivec.vrlqnm(<1 x i128>
+  // CHECK-COMMON-NEXT: ret <1 x i128>
----------------
nemanjai wrote:
> Please show the shift in the test case as well.
> Please show the shift in the test case as well.

This was still not addressed. Please show the shuffle in the checks.


================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll:59
+; Function Attrs: nounwind readnone
+define <1 x i128> @test_vrlqnm(<1 x i128> %a, <1 x i128> %b, <1 x i128> %c) {
+; CHECK-LABEL: test_vrlqnm:
----------------
Add a test case for this that was produced from `vec_rlnm` at -O2.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86819/new/

https://reviews.llvm.org/D86819