[clang] 13e19d2 - Revert "[InstCombine] Canonicalize SPF_ABS to abs intrinc"
Nikita Popov via cfe-commits
cfe-commits at lists.llvm.org
Fri Sep 18 00:38:35 PDT 2020
Author: Nikita Popov
Date: 2020-09-18T09:38:26+02:00
New Revision: 13e19d2e7cdc2a54bb85da702df47c8a04a6d857
URL: https://github.com/llvm/llvm-project/commit/13e19d2e7cdc2a54bb85da702df47c8a04a6d857
DIFF: https://github.com/llvm/llvm-project/commit/13e19d2e7cdc2a54bb85da702df47c8a04a6d857.diff
LOG: Revert "[InstCombine] Canonicalize SPF_ABS to abs intrinc"
This reverts commit 05d4c4ebc2fb006b8a2bd05b24c6aba10dd2eef8.
mstorsjo reports a miscompile after this change in
https://reviews.llvm.org/D87188#2281093. Reverting until I can
investigate this.
Added:
Modified:
clang/test/CodeGen/builtins-wasm.c
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/test/Transforms/InstCombine/abs-1.ll
llvm/test/Transforms/InstCombine/abs_abs.ll
llvm/test/Transforms/InstCombine/call-callconv.ll
llvm/test/Transforms/InstCombine/cttz-abs.ll
llvm/test/Transforms/InstCombine/icmp.ll
llvm/test/Transforms/InstCombine/max-of-nots.ll
llvm/test/Transforms/InstCombine/select_meta.ll
llvm/test/Transforms/InstCombine/sub-of-negatible.ll
llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll
Removed:
################################################################################
diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index 67b1586cb7c7..01e9273e0fb6 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -328,20 +328,26 @@ u8x16 sub_saturate_u_i8x16(u8x16 x, u8x16 y) {
i8x16 abs_i8x16(i8x16 v) {
return __builtin_wasm_abs_i8x16(v);
- // WEBASSEMBLY: call <16 x i8> @llvm.abs.v16i8(<16 x i8> %v, i1 false)
- // WEBASSEMBLY-NEXT: ret
+ // WEBASSEMBLY: %neg = sub <16 x i8> zeroinitializer, %v
+ // WEBASSEMBLY: %abscond = icmp slt <16 x i8> %v, zeroinitializer
+ // WEBASSEMBLY: %abs = select <16 x i1> %abscond, <16 x i8> %neg, <16 x i8> %v
+ // WEBASSEMBLY: ret <16 x i8> %abs
}
i16x8 abs_i16x8(i16x8 v) {
return __builtin_wasm_abs_i16x8(v);
- // WEBASSEMBLY: call <8 x i16> @llvm.abs.v8i16(<8 x i16> %v, i1 false)
- // WEBASSEMBLY-NEXT: ret
+ // WEBASSEMBLY: %neg = sub <8 x i16> zeroinitializer, %v
+ // WEBASSEMBLY: %abscond = icmp slt <8 x i16> %v, zeroinitializer
+ // WEBASSEMBLY: %abs = select <8 x i1> %abscond, <8 x i16> %neg, <8 x i16> %v
+ // WEBASSEMBLY: ret <8 x i16> %abs
}
i32x4 abs_i32x4(i32x4 v) {
return __builtin_wasm_abs_i32x4(v);
- // WEBASSEMBLY: call <4 x i32> @llvm.abs.v4i32(<4 x i32> %v, i1 false)
- // WEBASSEMBLY-NEXT: ret
+ // WEBASSEMBLY: %neg = sub <4 x i32> zeroinitializer, %v
+ // WEBASSEMBLY: %abscond = icmp slt <4 x i32> %v, zeroinitializer
+ // WEBASSEMBLY: %abs = select <4 x i1> %abscond, <4 x i32> %neg, <4 x i32> %v
+ // WEBASSEMBLY: ret <4 x i32> %abs
}
i8x16 min_s_i8x16(i8x16 x, i8x16 y) {
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index a08f5371f948..ce473410f4ca 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1064,29 +1064,89 @@ static Instruction *canonicalizeMinMaxWithConstant(SelectInst &Sel,
return &Sel;
}
-/// Canonicalize select-based abs/nabs to llvm.abs() intrinsic.
+/// There are many select variants for each of ABS/NABS.
+/// In matchSelectPattern(), there are
diff erent compare constants, compare
+/// predicates/operands and select operands.
+/// In isKnownNegation(), there are
diff erent formats of negated operands.
+/// Canonicalize all these variants to 1 pattern.
+/// This makes CSE more likely.
static Instruction *canonicalizeAbsNabs(SelectInst &Sel, ICmpInst &Cmp,
InstCombinerImpl &IC) {
if (!Cmp.hasOneUse() || !isa<Constant>(Cmp.getOperand(1)))
return nullptr;
+ // Choose a sign-bit check for the compare (likely simpler for codegen).
+ // ABS: (X <s 0) ? -X : X
+ // NABS: (X <s 0) ? X : -X
Value *LHS, *RHS;
SelectPatternFlavor SPF = matchSelectPattern(&Sel, LHS, RHS).Flavor;
if (SPF != SelectPatternFlavor::SPF_ABS &&
SPF != SelectPatternFlavor::SPF_NABS)
return nullptr;
- bool IntMinIsPoison = match(RHS, m_NSWNeg(m_Specific(LHS)));
- Constant *IntMinIsPoisonC =
- ConstantInt::get(Type::getInt1Ty(Sel.getContext()), IntMinIsPoison);
- Instruction *Abs =
- IC.Builder.CreateBinaryIntrinsic(Intrinsic::abs, LHS, IntMinIsPoisonC);
+ Value *TVal = Sel.getTrueValue();
+ Value *FVal = Sel.getFalseValue();
+ assert(isKnownNegation(TVal, FVal) &&
+ "Unexpected result from matchSelectPattern");
+
+ // The compare may use the negated abs()/nabs() operand, or it may use
+ // negation in non-canonical form such as: sub A, B.
+ bool CmpUsesNegatedOp = match(Cmp.getOperand(0), m_Neg(m_Specific(TVal))) ||
+ match(Cmp.getOperand(0), m_Neg(m_Specific(FVal)));
+
+ bool CmpCanonicalized = !CmpUsesNegatedOp &&
+ match(Cmp.getOperand(1), m_ZeroInt()) &&
+ Cmp.getPredicate() == ICmpInst::ICMP_SLT;
+ bool RHSCanonicalized = match(RHS, m_Neg(m_Specific(LHS)));
+
+ // Is this already canonical?
+ if (CmpCanonicalized && RHSCanonicalized)
+ return nullptr;
+
+ // If RHS is not canonical but is used by other instructions, don't
+ // canonicalize it and potentially increase the instruction count.
+ if (!RHSCanonicalized)
+ if (!(RHS->hasOneUse() || (RHS->hasNUses(2) && CmpUsesNegatedOp)))
+ return nullptr;
- if (SPF == SelectPatternFlavor::SPF_NABS)
- return IntMinIsPoison ? BinaryOperator::CreateNSWNeg(Abs)
- : BinaryOperator::CreateNeg(Abs);
+ // Create the canonical compare: icmp slt LHS 0.
+ if (!CmpCanonicalized) {
+ Cmp.setPredicate(ICmpInst::ICMP_SLT);
+ Cmp.setOperand(1, ConstantInt::getNullValue(Cmp.getOperand(0)->getType()));
+ if (CmpUsesNegatedOp)
+ Cmp.setOperand(0, LHS);
+ }
+
+ // Create the canonical RHS: RHS = sub (0, LHS).
+ if (!RHSCanonicalized) {
+ assert(RHS->hasOneUse() && "RHS use number is not right");
+ RHS = IC.Builder.CreateNeg(LHS);
+ if (TVal == LHS) {
+ // Replace false value.
+ IC.replaceOperand(Sel, 2, RHS);
+ FVal = RHS;
+ } else {
+ // Replace true value.
+ IC.replaceOperand(Sel, 1, RHS);
+ TVal = RHS;
+ }
+ }
- return IC.replaceInstUsesWith(Sel, Abs);
+ // If the select operands do not change, we're done.
+ if (SPF == SelectPatternFlavor::SPF_NABS) {
+ if (TVal == LHS)
+ return &Sel;
+ assert(FVal == LHS && "Unexpected results from matchSelectPattern");
+ } else {
+ if (FVal == LHS)
+ return &Sel;
+ assert(TVal == LHS && "Unexpected results from matchSelectPattern");
+ }
+
+ // We are swapping the select operands, so swap the metadata too.
+ Sel.swapValues();
+ Sel.swapProfMetadata();
+ return &Sel;
}
/// If we have a select with an equality comparison, then we know the value in
diff --git a/llvm/test/Transforms/InstCombine/abs-1.ll b/llvm/test/Transforms/InstCombine/abs-1.ll
index fbc0fc1a835c..f879b165f4b8 100644
--- a/llvm/test/Transforms/InstCombine/abs-1.ll
+++ b/llvm/test/Transforms/InstCombine/abs-1.ll
@@ -12,8 +12,10 @@ declare i64 @llabs(i64)
define i32 @test_abs(i32 %x) {
; CHECK-LABEL: @test_abs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%ret = call i32 @abs(i32 %x)
ret i32 %ret
@@ -21,8 +23,10 @@ define i32 @test_abs(i32 %x) {
define i64 @test_labs(i64 %x) {
; CHECK-LABEL: @test_labs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i64 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[X]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[NEG]], i64 [[X]]
+; CHECK-NEXT: ret i64 [[TMP2]]
;
%ret = call i64 @labs(i64 %x)
ret i64 %ret
@@ -30,8 +34,10 @@ define i64 @test_labs(i64 %x) {
define i64 @test_llabs(i64 %x) {
; CHECK-LABEL: @test_llabs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i64 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i64 0, [[X]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[NEG]], i64 [[X]]
+; CHECK-NEXT: ret i64 [[TMP2]]
;
%ret = call i64 @llabs(i64 %x)
ret i64 %ret
@@ -41,8 +47,10 @@ define i64 @test_llabs(i64 %x) {
define i8 @abs_canonical_1(i8 %x) {
; CHECK-LABEL: @abs_canonical_1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp sgt i8 %x, 0
%neg = sub i8 0, %x
@@ -54,8 +62,10 @@ define i8 @abs_canonical_1(i8 %x) {
define <2 x i8> @abs_canonical_2(<2 x i8> %x) {
; CHECK-LABEL: @abs_canonical_2(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
-; CHECK-NEXT: ret <2 x i8> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]]
+; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%cmp = icmp sgt <2 x i8> %x, <i8 -1, i8 -1>
%neg = sub <2 x i8> zeroinitializer, %x
@@ -67,8 +77,10 @@ define <2 x i8> @abs_canonical_2(<2 x i8> %x) {
define <2 x i8> @abs_canonical_2_vec_undef_elts(<2 x i8> %x) {
; CHECK-LABEL: @abs_canonical_2_vec_undef_elts(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
-; CHECK-NEXT: ret <2 x i8> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[NEG]], <2 x i8> [[X]]
+; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%cmp = icmp sgt <2 x i8> %x, <i8 undef, i8 -1>
%neg = sub <2 x i8> zeroinitializer, %x
@@ -80,8 +92,10 @@ define <2 x i8> @abs_canonical_2_vec_undef_elts(<2 x i8> %x) {
define i8 @abs_canonical_3(i8 %x) {
; CHECK-LABEL: @abs_canonical_3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp slt i8 %x, 0
%neg = sub nsw i8 0, %x
@@ -91,8 +105,10 @@ define i8 @abs_canonical_3(i8 %x) {
define i8 @abs_canonical_4(i8 %x) {
; CHECK-LABEL: @abs_canonical_4(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[NEG]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp slt i8 %x, 1
%neg = sub i8 0, %x
@@ -102,9 +118,11 @@ define i8 @abs_canonical_4(i8 %x) {
define i32 @abs_canonical_5(i8 %x) {
; CHECK-LABEL: @abs_canonical_5(
-; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X]] to i32
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[CONV]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[NEG]], i32 [[CONV]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%cmp = icmp sgt i8 %x, 0
%conv = sext i8 %x to i32
@@ -116,8 +134,10 @@ define i32 @abs_canonical_5(i8 %x) {
define i32 @abs_canonical_6(i32 %a, i32 %b) {
; CHECK-LABEL: @abs_canonical_6(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[TMP1]], i32 [[T1]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%t1 = sub i32 %a, %b
%cmp = icmp sgt i32 %t1, -1
@@ -129,8 +149,10 @@ define i32 @abs_canonical_6(i32 %a, i32 %b) {
define <2 x i8> @abs_canonical_7(<2 x i8> %a, <2 x i8 > %b) {
; CHECK-LABEL: @abs_canonical_7(
; CHECK-NEXT: [[T1:%.*]] = sub <2 x i8> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[T1]], i1 false)
-; CHECK-NEXT: ret <2 x i8> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[T1]], zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[TMP1]], <2 x i8> [[T1]]
+; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%t1 = sub <2 x i8> %a, %b
@@ -142,8 +164,10 @@ define <2 x i8> @abs_canonical_7(<2 x i8> %a, <2 x i8 > %b) {
define i32 @abs_canonical_8(i32 %a) {
; CHECK-LABEL: @abs_canonical_8(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[A:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T]], i32 [[A]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%t = sub i32 0, %a
%cmp = icmp slt i32 %t, 0
@@ -154,9 +178,10 @@ define i32 @abs_canonical_8(i32 %a) {
define i32 @abs_canonical_9(i32 %a, i32 %b) {
; CHECK-LABEL: @abs_canonical_9(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[T1]], -1
; CHECK-NEXT: [[T2:%.*]] = sub i32 [[B]], [[A]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[T2]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[T2]]
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[ABS]], [[T2]]
; CHECK-NEXT: ret i32 [[ADD]]
;
%t1 = sub i32 %a, %b
@@ -170,8 +195,10 @@ define i32 @abs_canonical_9(i32 %a, i32 %b) {
define i32 @abs_canonical_10(i32 %a, i32 %b) {
; CHECK-LABEL: @abs_canonical_10(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[TMP1]], i32 [[T1]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%t2 = sub i32 %b, %a
%t1 = sub i32 %a, %b
@@ -184,8 +211,9 @@ define i32 @abs_canonical_10(i32 %a, i32 %b) {
define i8 @nabs_canonical_1(i8 %x) {
; CHECK-LABEL: @nabs_canonical_1(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp sgt i8 %x, 0
@@ -198,8 +226,9 @@ define i8 @nabs_canonical_1(i8 %x) {
define <2 x i8> @nabs_canonical_2(<2 x i8> %x) {
; CHECK-LABEL: @nabs_canonical_2(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[X]], <2 x i8> [[NEG]]
; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%cmp = icmp sgt <2 x i8> %x, <i8 -1, i8 -1>
@@ -212,8 +241,9 @@ define <2 x i8> @nabs_canonical_2(<2 x i8> %x) {
define <2 x i8> @nabs_canonical_2_vec_undef_elts(<2 x i8> %x) {
; CHECK-LABEL: @nabs_canonical_2_vec_undef_elts(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[NEG:%.*]] = sub <2 x i8> zeroinitializer, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[X]], <2 x i8> [[NEG]]
; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%cmp = icmp sgt <2 x i8> %x, <i8 -1, i8 undef>
@@ -226,8 +256,9 @@ define <2 x i8> @nabs_canonical_2_vec_undef_elts(<2 x i8> %x) {
define i8 @nabs_canonical_3(i8 %x) {
; CHECK-LABEL: @nabs_canonical_3(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[ABS:%.*]] = sub nsw i8 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp slt i8 %x, 0
@@ -238,8 +269,9 @@ define i8 @nabs_canonical_3(i8 %x) {
define i8 @nabs_canonical_4(i8 %x) {
; CHECK-LABEL: @nabs_canonical_4(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[ABS]]
;
%cmp = icmp slt i8 %x, 1
@@ -250,9 +282,10 @@ define i8 @nabs_canonical_4(i8 %x) {
define i32 @nabs_canonical_5(i8 %x) {
; CHECK-LABEL: @nabs_canonical_5(
-; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 true)
-; CHECK-NEXT: [[ABS:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X]] to i32
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[CONV]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[CONV]], i32 [[NEG]]
; CHECK-NEXT: ret i32 [[ABS]]
;
%cmp = icmp sgt i8 %x, 0
@@ -265,8 +298,9 @@ define i32 @nabs_canonical_5(i8 %x) {
define i32 @nabs_canonical_6(i32 %a, i32 %b) {
; CHECK-LABEL: @nabs_canonical_6(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[ABS]]
;
%t1 = sub i32 %a, %b
@@ -279,8 +313,9 @@ define i32 @nabs_canonical_6(i32 %a, i32 %b) {
define <2 x i8> @nabs_canonical_7(<2 x i8> %a, <2 x i8 > %b) {
; CHECK-LABEL: @nabs_canonical_7(
; CHECK-NEXT: [[T1:%.*]] = sub <2 x i8> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[T1]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub <2 x i8> zeroinitializer, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i8> [[T1]], zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i8> zeroinitializer, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[T1]], <2 x i8> [[TMP1]]
; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%t1 = sub <2 x i8> %a, %b
@@ -292,8 +327,9 @@ define <2 x i8> @nabs_canonical_7(<2 x i8> %a, <2 x i8 > %b) {
define i32 @nabs_canonical_8(i32 %a) {
; CHECK-LABEL: @nabs_canonical_8(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A:%.*]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[T:%.*]] = sub i32 0, [[A:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[T]]
; CHECK-NEXT: ret i32 [[ABS]]
;
%t = sub i32 0, %a
@@ -305,9 +341,10 @@ define i32 @nabs_canonical_8(i32 %a) {
define i32 @nabs_canonical_9(i32 %a, i32 %b) {
; CHECK-LABEL: @nabs_canonical_9(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[T1]], -1
; CHECK-NEXT: [[T2:%.*]] = sub i32 [[B]], [[A]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[T2]], [[TMP1]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T2]], i32 [[T1]]
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[T2]], [[ABS]]
; CHECK-NEXT: ret i32 [[ADD]]
;
%t1 = sub i32 %a, %b
@@ -321,8 +358,9 @@ define i32 @nabs_canonical_9(i32 %a, i32 %b) {
define i32 @nabs_canonical_10(i32 %a, i32 %b) {
; CHECK-LABEL: @nabs_canonical_10(
; CHECK-NEXT: [[T1:%.*]] = sub i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[T1]], i1 false)
-; CHECK-NEXT: [[ABS:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[T1]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[T1]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[T1]], i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[ABS]]
;
%t2 = sub i32 %b, %a
@@ -338,8 +376,10 @@ define i32 @nabs_canonical_10(i32 %a, i32 %b) {
define i8 @shifty_abs_commute0(i8 %x) {
; CHECK-LABEL: @shifty_abs_commute0(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%signbit = ashr i8 %x, 7
%add = add i8 %signbit, %x
@@ -349,8 +389,10 @@ define i8 @shifty_abs_commute0(i8 %x) {
define i8 @shifty_abs_commute0_nsw(i8 %x) {
; CHECK-LABEL: @shifty_abs_commute0_nsw(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i8 0, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%signbit = ashr i8 %x, 7
%add = add nsw i8 %signbit, %x
@@ -375,8 +417,10 @@ define i8 @shifty_abs_commute0_nuw(i8 %x) {
define <2 x i8> @shifty_abs_commute1(<2 x i8> %x) {
; CHECK-LABEL: @shifty_abs_commute1(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
-; CHECK-NEXT: ret <2 x i8> [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i8> zeroinitializer, [[X]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[TMP1]], <2 x i8> [[TMP2]], <2 x i8> [[X]]
+; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%signbit = ashr <2 x i8> %x, <i8 7, i8 7>
%add = add <2 x i8> %signbit, %x
@@ -387,8 +431,10 @@ define <2 x i8> @shifty_abs_commute1(<2 x i8> %x) {
define <2 x i8> @shifty_abs_commute2(<2 x i8> %x) {
; CHECK-LABEL: @shifty_abs_commute2(
; CHECK-NEXT: [[Y:%.*]] = mul <2 x i8> [[X:%.*]], <i8 3, i8 3>
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[Y]], i1 false)
-; CHECK-NEXT: ret <2 x i8> [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i8> [[Y]], zeroinitializer
+; CHECK-NEXT: [[TMP2:%.*]] = sub <2 x i8> zeroinitializer, [[Y]]
+; CHECK-NEXT: [[ABS:%.*]] = select <2 x i1> [[TMP1]], <2 x i8> [[TMP2]], <2 x i8> [[Y]]
+; CHECK-NEXT: ret <2 x i8> [[ABS]]
;
%y = mul <2 x i8> %x, <i8 3, i8 3> ; extra op to thwart complexity-based canonicalization
%signbit = ashr <2 x i8> %y, <i8 7, i8 7>
@@ -400,8 +446,10 @@ define <2 x i8> @shifty_abs_commute2(<2 x i8> %x) {
define i8 @shifty_abs_commute3(i8 %x) {
; CHECK-LABEL: @shifty_abs_commute3(
; CHECK-NEXT: [[Y:%.*]] = mul i8 [[X:%.*]], 3
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[Y]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[Y]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[Y]]
+; CHECK-NEXT: ret i8 [[ABS]]
;
%y = mul i8 %x, 3 ; extra op to thwart complexity-based canonicalization
%signbit = ashr i8 %y, 7
@@ -435,8 +483,10 @@ define i8 @shifty_abs_too_many_uses(i8 %x) {
define i8 @shifty_sub(i8 %x) {
; CHECK-LABEL: @shifty_sub(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = sub i8 0, [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[R]]
;
%sh = ashr i8 %x, 7
%xor = xor i8 %x, %sh
@@ -446,8 +496,10 @@ define i8 @shifty_sub(i8 %x) {
define i8 @shifty_sub_nsw_commute(i8 %x) {
; CHECK-LABEL: @shifty_sub_nsw_commute(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i8 0, [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i8 [[TMP2]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[R]]
;
%sh = ashr i8 %x, 7
%xor = xor i8 %sh, %x
@@ -481,9 +533,10 @@ define i12 @shifty_sub_nsw_nuw(i12 %x) {
define i8 @negate_abs(i8 %x) {
; CHECK-LABEL: @negate_abs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
-; CHECK-NEXT: [[R:%.*]] = sub i8 0, [[TMP1]]
-; CHECK-NEXT: ret i8 [[R]]
+; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i8 [[X]], i8 [[N]]
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%n = sub i8 0, %x
%c = icmp slt i8 %x, 0
@@ -494,7 +547,9 @@ define i8 @negate_abs(i8 %x) {
define <2 x i8> @negate_nabs(<2 x i8> %x) {
; CHECK-LABEL: @negate_nabs(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.abs.v2i8(<2 x i8> [[X:%.*]], i1 false)
+; CHECK-NEXT: [[N:%.*]] = sub <2 x i8> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i8> [[X]], zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[C]], <2 x i8> [[N]], <2 x i8> [[X]]
; CHECK-NEXT: ret <2 x i8> [[TMP1]]
;
%n = sub <2 x i8> zeroinitializer, %x
@@ -519,8 +574,9 @@ define i8 @abs_swapped(i8 %a) {
; CHECK-LABEL: @abs_swapped(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: call void @extra_use(i8 [[NEG]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]]
+; CHECK-NEXT: ret i8 [[M1]]
;
%neg = sub i8 0, %a
call void @extra_use(i8 %neg)
@@ -533,8 +589,8 @@ define i8 @nabs_swapped(i8 %a) {
; CHECK-LABEL: @nabs_swapped(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: call void @extra_use(i8 [[NEG]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false)
-; CHECK-NEXT: [[M2:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M2:%.*]] = select i1 [[CMP2]], i8 [[A]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[M2]]
;
%neg = sub i8 0, %a
@@ -548,8 +604,9 @@ define i8 @abs_
diff erent_constants(i8 %a) {
; CHECK-LABEL: @abs_
diff erent_constants(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: call void @extra_use(i8 [[NEG]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]]
+; CHECK-NEXT: ret i8 [[M1]]
;
%neg = sub i8 0, %a
call void @extra_use(i8 %neg)
@@ -562,8 +619,8 @@ define i8 @nabs_
diff erent_constants(i8 %a) {
; CHECK-LABEL: @nabs_
diff erent_constants(
; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
; CHECK-NEXT: call void @extra_use(i8 [[NEG]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A]], i1 false)
-; CHECK-NEXT: [[M2:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M2:%.*]] = select i1 [[CMP2]], i8 [[A]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[M2]]
;
%neg = sub i8 0, %a
@@ -580,8 +637,10 @@ define i8 @nabs_
diff erent_constants(i8 %a) {
define i64 @infinite_loop_constant_expression_abs(i64 %arg) {
; CHECK-LABEL: @infinite_loop_constant_expression_abs(
; CHECK-NEXT: [[T:%.*]] = sub i64 ptrtoint (i64* @g to i64), [[ARG:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.abs.i64(i64 [[T]], i1 true)
-; CHECK-NEXT: ret i64 [[TMP1]]
+; CHECK-NEXT: [[T1:%.*]] = icmp slt i64 [[T]], 0
+; CHECK-NEXT: [[T2:%.*]] = sub nsw i64 0, [[T]]
+; CHECK-NEXT: [[T3:%.*]] = select i1 [[T1]], i64 [[T2]], i64 [[T]]
+; CHECK-NEXT: ret i64 [[T3]]
;
%t = sub i64 ptrtoint (i64* @g to i64), %arg
%t1 = icmp slt i64 %t, 0
@@ -607,10 +666,11 @@ define i8 @abs_extra_use_icmp(i8 %x) {
define i8 @abs_extra_use_sub(i8 %x) {
; CHECK-LABEL: @abs_extra_use_sub(
-; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X]]
; CHECK-NEXT: call void @extra_use(i8 [[N]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i8 [[N]], i8 [[X]]
+; CHECK-NEXT: ret i8 [[S]]
;
%c = icmp slt i8 %x, 0
%n = sub i8 0, %x
@@ -653,10 +713,10 @@ define i8 @nabs_extra_use_icmp(i8 %x) {
define i8 @nabs_extra_use_sub(i8 %x) {
; CHECK-LABEL: @nabs_extra_use_sub(
-; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X:%.*]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt i8 [[X:%.*]], 0
+; CHECK-NEXT: [[N:%.*]] = sub i8 0, [[X]]
; CHECK-NEXT: call void @extra_use(i8 [[N]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
-; CHECK-NEXT: [[S:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i8 [[X]], i8 [[N]]
; CHECK-NEXT: ret i8 [[S]]
;
%c = icmp slt i8 %x, 0
diff --git a/llvm/test/Transforms/InstCombine/abs_abs.ll b/llvm/test/Transforms/InstCombine/abs_abs.ll
index f2faf35a2515..207ceb5215a7 100644
--- a/llvm/test/Transforms/InstCombine/abs_abs.ll
+++ b/llvm/test/Transforms/InstCombine/abs_abs.ll
@@ -3,8 +3,10 @@
define i32 @abs_abs_x01(i32 %x) {
; CHECK-LABEL: @abs_abs_x01(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -17,8 +19,10 @@ define i32 @abs_abs_x01(i32 %x) {
define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_abs_x01_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
%sub = sub nsw <2 x i32> zeroinitializer, %x
@@ -31,8 +35,10 @@ define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) {
define i32 @abs_abs_x02(i32 %x) {
; CHECK-LABEL: @abs_abs_x02(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -45,8 +51,10 @@ define i32 @abs_abs_x02(i32 %x) {
define i32 @abs_abs_x03(i32 %x) {
; CHECK-LABEL: @abs_abs_x03(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -59,8 +67,10 @@ define i32 @abs_abs_x03(i32 %x) {
define i32 @abs_abs_x04(i32 %x) {
; CHECK-LABEL: @abs_abs_x04(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -73,8 +83,10 @@ define i32 @abs_abs_x04(i32 %x) {
define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_abs_x04_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%cmp = icmp slt <2 x i32> %x, <i32 1, i32 1>
%sub = sub nsw <2 x i32> zeroinitializer, %x
@@ -87,8 +99,10 @@ define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) {
define i32 @abs_abs_x05(i32 %x) {
; CHECK-LABEL: @abs_abs_x05(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -101,8 +115,10 @@ define i32 @abs_abs_x05(i32 %x) {
define i32 @abs_abs_x06(i32 %x) {
; CHECK-LABEL: @abs_abs_x06(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -115,8 +131,10 @@ define i32 @abs_abs_x06(i32 %x) {
define i32 @abs_abs_x07(i32 %x) {
; CHECK-LABEL: @abs_abs_x07(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -129,8 +147,10 @@ define i32 @abs_abs_x07(i32 %x) {
define i32 @abs_abs_x08(i32 %x) {
; CHECK-LABEL: @abs_abs_x08(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -143,8 +163,10 @@ define i32 @abs_abs_x08(i32 %x) {
define i32 @abs_abs_x09(i32 %x) {
; CHECK-LABEL: @abs_abs_x09(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -157,8 +179,10 @@ define i32 @abs_abs_x09(i32 %x) {
define i32 @abs_abs_x10(i32 %x) {
; CHECK-LABEL: @abs_abs_x10(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -171,8 +195,10 @@ define i32 @abs_abs_x10(i32 %x) {
define i32 @abs_abs_x11(i32 %x) {
; CHECK-LABEL: @abs_abs_x11(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -185,8 +211,10 @@ define i32 @abs_abs_x11(i32 %x) {
define i32 @abs_abs_x12(i32 %x) {
; CHECK-LABEL: @abs_abs_x12(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -199,8 +227,10 @@ define i32 @abs_abs_x12(i32 %x) {
define i32 @abs_abs_x13(i32 %x) {
; CHECK-LABEL: @abs_abs_x13(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -213,8 +243,10 @@ define i32 @abs_abs_x13(i32 %x) {
define i32 @abs_abs_x14(i32 %x) {
; CHECK-LABEL: @abs_abs_x14(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -227,8 +259,10 @@ define i32 @abs_abs_x14(i32 %x) {
define i32 @abs_abs_x15(i32 %x) {
; CHECK-LABEL: @abs_abs_x15(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -241,8 +275,10 @@ define i32 @abs_abs_x15(i32 %x) {
define i32 @abs_abs_x16(i32 %x) {
; CHECK-LABEL: @abs_abs_x16(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -256,8 +292,10 @@ define i32 @abs_abs_x16(i32 %x) {
; abs(abs(-x)) -> abs(-x) -> abs(x)
define i32 @abs_abs_x17(i32 %x) {
; CHECK-LABEL: @abs_abs_x17(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub nsw i32 0, %x
%cmp = icmp sgt i32 %sub, -1
@@ -272,8 +310,10 @@ define i32 @abs_abs_x17(i32 %x) {
define i32 @abs_abs_x18(i32 %x, i32 %y) {
; CHECK-LABEL: @abs_abs_x18(
; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[NEGA]], i32 [[A]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%a = sub nsw i32 %x, %y
%b = sub nsw i32 %y, %x
@@ -288,8 +328,10 @@ define i32 @abs_abs_x18(i32 %x, i32 %y) {
; abs(abs(-x)) -> abs(-x) -> abs(x)
define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_abs_x02_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@@ -304,8 +346,10 @@ define <2 x i32> @abs_abs_x02_vec(<2 x i32> %x) {
define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @abs_abs_x03_vec(
; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer
+; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[NEGA]], <2 x i32> [[A]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%a = sub nsw <2 x i32> %x, %y
%b = sub nsw <2 x i32> %y, %x
@@ -319,8 +363,9 @@ define <2 x i32> @abs_abs_x03_vec(<2 x i32> %x, <2 x i32> %y) {
define i32 @nabs_nabs_x01(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x01(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
@@ -334,8 +379,9 @@ define i32 @nabs_nabs_x01(i32 %x) {
define i32 @nabs_nabs_x02(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x02(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
@@ -349,8 +395,9 @@ define i32 @nabs_nabs_x02(i32 %x) {
define i32 @nabs_nabs_x03(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x03(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
@@ -364,8 +411,9 @@ define i32 @nabs_nabs_x03(i32 %x) {
define i32 @nabs_nabs_x04(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x04(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
@@ -379,8 +427,9 @@ define i32 @nabs_nabs_x04(i32 %x) {
define i32 @nabs_nabs_x05(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x05(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
@@ -394,8 +443,9 @@ define i32 @nabs_nabs_x05(i32 %x) {
define i32 @nabs_nabs_x06(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x06(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
@@ -409,8 +459,9 @@ define i32 @nabs_nabs_x06(i32 %x) {
define i32 @nabs_nabs_x07(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x07(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
@@ -424,8 +475,9 @@ define i32 @nabs_nabs_x07(i32 %x) {
define i32 @nabs_nabs_x08(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x08(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
@@ -439,8 +491,9 @@ define i32 @nabs_nabs_x08(i32 %x) {
define i32 @nabs_nabs_x09(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x09(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
@@ -454,8 +507,9 @@ define i32 @nabs_nabs_x09(i32 %x) {
define i32 @nabs_nabs_x10(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x10(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
@@ -469,8 +523,9 @@ define i32 @nabs_nabs_x10(i32 %x) {
define i32 @nabs_nabs_x11(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x11(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
@@ -484,8 +539,9 @@ define i32 @nabs_nabs_x11(i32 %x) {
define i32 @nabs_nabs_x12(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x12(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
@@ -499,8 +555,9 @@ define i32 @nabs_nabs_x12(i32 %x) {
define i32 @nabs_nabs_x13(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x13(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
@@ -514,8 +571,9 @@ define i32 @nabs_nabs_x13(i32 %x) {
define i32 @nabs_nabs_x14(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x14(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
@@ -529,8 +587,9 @@ define i32 @nabs_nabs_x14(i32 %x) {
define i32 @nabs_nabs_x15(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x15(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
@@ -544,8 +603,9 @@ define i32 @nabs_nabs_x15(i32 %x) {
define i32 @nabs_nabs_x16(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x16(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
@@ -560,8 +620,9 @@ define i32 @nabs_nabs_x16(i32 %x) {
; nabs(nabs(-x)) -> nabs(-x) -> nabs(x)
define i32 @nabs_nabs_x17(i32 %x) {
; CHECK-LABEL: @nabs_nabs_x17(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub nsw i32 0, %x
@@ -577,9 +638,10 @@ define i32 @nabs_nabs_x17(i32 %x) {
define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
; CHECK-LABEL: @nabs_nabs_x18(
; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
-; CHECK-NEXT: [[COND18:%.*]] = sub i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[COND18]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[NEGA]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%a = sub nsw i32 %x, %y
%b = sub nsw i32 %y, %x
@@ -594,8 +656,9 @@ define i32 @nabs_nabs_x18(i32 %x, i32 %y) {
; nabs(nabs(-x)) -> nabs(-x) -> nabs(x)
define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @nabs_nabs_x01_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: [[COND:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
@@ -611,9 +674,10 @@ define <2 x i32> @nabs_nabs_x01_vec(<2 x i32> %x) {
define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @nabs_nabs_x02_vec(
; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
-; CHECK-NEXT: [[COND18:%.*]] = sub <2 x i32> zeroinitializer, [[TMP1]]
-; CHECK-NEXT: ret <2 x i32> [[COND18]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer
+; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[NEGA]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%a = sub nsw <2 x i32> %x, %y
%b = sub nsw <2 x i32> %y, %x
@@ -627,8 +691,10 @@ define <2 x i32> @nabs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
define i32 @abs_nabs_x01(i32 %x) {
; CHECK-LABEL: @abs_nabs_x01(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -641,8 +707,10 @@ define i32 @abs_nabs_x01(i32 %x) {
define i32 @abs_nabs_x02(i32 %x) {
; CHECK-LABEL: @abs_nabs_x02(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -655,8 +723,10 @@ define i32 @abs_nabs_x02(i32 %x) {
define i32 @abs_nabs_x03(i32 %x) {
; CHECK-LABEL: @abs_nabs_x03(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -669,8 +739,10 @@ define i32 @abs_nabs_x03(i32 %x) {
define i32 @abs_nabs_x04(i32 %x) {
; CHECK-LABEL: @abs_nabs_x04(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -683,8 +755,10 @@ define i32 @abs_nabs_x04(i32 %x) {
define i32 @abs_nabs_x05(i32 %x) {
; CHECK-LABEL: @abs_nabs_x05(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -697,8 +771,10 @@ define i32 @abs_nabs_x05(i32 %x) {
define i32 @abs_nabs_x06(i32 %x) {
; CHECK-LABEL: @abs_nabs_x06(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -711,8 +787,10 @@ define i32 @abs_nabs_x06(i32 %x) {
define i32 @abs_nabs_x07(i32 %x) {
; CHECK-LABEL: @abs_nabs_x07(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -725,8 +803,10 @@ define i32 @abs_nabs_x07(i32 %x) {
define i32 @abs_nabs_x08(i32 %x) {
; CHECK-LABEL: @abs_nabs_x08(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -739,8 +819,10 @@ define i32 @abs_nabs_x08(i32 %x) {
define i32 @abs_nabs_x09(i32 %x) {
; CHECK-LABEL: @abs_nabs_x09(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -753,8 +835,10 @@ define i32 @abs_nabs_x09(i32 %x) {
define i32 @abs_nabs_x10(i32 %x) {
; CHECK-LABEL: @abs_nabs_x10(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -767,8 +851,10 @@ define i32 @abs_nabs_x10(i32 %x) {
define i32 @abs_nabs_x11(i32 %x) {
; CHECK-LABEL: @abs_nabs_x11(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -781,8 +867,10 @@ define i32 @abs_nabs_x11(i32 %x) {
define i32 @abs_nabs_x12(i32 %x) {
; CHECK-LABEL: @abs_nabs_x12(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -795,8 +883,10 @@ define i32 @abs_nabs_x12(i32 %x) {
define i32 @abs_nabs_x13(i32 %x) {
; CHECK-LABEL: @abs_nabs_x13(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -809,8 +899,10 @@ define i32 @abs_nabs_x13(i32 %x) {
define i32 @abs_nabs_x14(i32 %x) {
; CHECK-LABEL: @abs_nabs_x14(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -823,8 +915,10 @@ define i32 @abs_nabs_x14(i32 %x) {
define i32 @abs_nabs_x15(i32 %x) {
; CHECK-LABEL: @abs_nabs_x15(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -837,8 +931,10 @@ define i32 @abs_nabs_x15(i32 %x) {
define i32 @abs_nabs_x16(i32 %x) {
; CHECK-LABEL: @abs_nabs_x16(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -852,8 +948,10 @@ define i32 @abs_nabs_x16(i32 %x) {
; abs(nabs(-x)) -> abs(-x) -> abs(x)
define i32 @abs_nabs_x17(i32 %x) {
; CHECK-LABEL: @abs_nabs_x17(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub nsw i32 0, %x
%cmp = icmp sgt i32 %sub, -1
@@ -868,8 +966,10 @@ define i32 @abs_nabs_x17(i32 %x) {
define i32 @abs_nabs_x18(i32 %x, i32 %y) {
; CHECK-LABEL: @abs_nabs_x18(
; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[NEGA]], i32 [[A]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%a = sub nsw i32 %x, %y
%b = sub nsw i32 %y, %x
@@ -884,8 +984,10 @@ define i32 @abs_nabs_x18(i32 %x, i32 %y) {
; abs(nabs(-x)) -> abs(-x) -> abs(x)
define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_nabs_x01_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@@ -900,8 +1002,10 @@ define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @abs_nabs_x02_vec(
; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer
+; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[NEGA]], <2 x i32> [[A]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%a = sub nsw <2 x i32> %x, %y
%b = sub nsw <2 x i32> %y, %x
@@ -915,9 +1019,10 @@ define <2 x i32> @abs_nabs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
define i32 @nabs_abs_x01(i32 %x) {
; CHECK-LABEL: @nabs_abs_x01(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -930,9 +1035,10 @@ define i32 @nabs_abs_x01(i32 %x) {
define i32 @nabs_abs_x02(i32 %x) {
; CHECK-LABEL: @nabs_abs_x02(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -945,9 +1051,10 @@ define i32 @nabs_abs_x02(i32 %x) {
define i32 @nabs_abs_x03(i32 %x) {
; CHECK-LABEL: @nabs_abs_x03(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -960,9 +1067,10 @@ define i32 @nabs_abs_x03(i32 %x) {
define i32 @nabs_abs_x04(i32 %x) {
; CHECK-LABEL: @nabs_abs_x04(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -975,9 +1083,10 @@ define i32 @nabs_abs_x04(i32 %x) {
define i32 @nabs_abs_x05(i32 %x) {
; CHECK-LABEL: @nabs_abs_x05(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -990,9 +1099,10 @@ define i32 @nabs_abs_x05(i32 %x) {
define i32 @nabs_abs_x06(i32 %x) {
; CHECK-LABEL: @nabs_abs_x06(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1005,9 +1115,10 @@ define i32 @nabs_abs_x06(i32 %x) {
define i32 @nabs_abs_x07(i32 %x) {
; CHECK-LABEL: @nabs_abs_x07(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1020,9 +1131,10 @@ define i32 @nabs_abs_x07(i32 %x) {
define i32 @nabs_abs_x08(i32 %x) {
; CHECK-LABEL: @nabs_abs_x08(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB9:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB9]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -1035,9 +1147,10 @@ define i32 @nabs_abs_x08(i32 %x) {
define i32 @nabs_abs_x09(i32 %x) {
; CHECK-LABEL: @nabs_abs_x09(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -1050,9 +1163,10 @@ define i32 @nabs_abs_x09(i32 %x) {
define i32 @nabs_abs_x10(i32 %x) {
; CHECK-LABEL: @nabs_abs_x10(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1065,9 +1179,10 @@ define i32 @nabs_abs_x10(i32 %x) {
define i32 @nabs_abs_x11(i32 %x) {
; CHECK-LABEL: @nabs_abs_x11(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1080,9 +1195,10 @@ define i32 @nabs_abs_x11(i32 %x) {
define i32 @nabs_abs_x12(i32 %x) {
; CHECK-LABEL: @nabs_abs_x12(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -1095,9 +1211,10 @@ define i32 @nabs_abs_x12(i32 %x) {
define i32 @nabs_abs_x13(i32 %x) {
; CHECK-LABEL: @nabs_abs_x13(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -1110,9 +1227,10 @@ define i32 @nabs_abs_x13(i32 %x) {
define i32 @nabs_abs_x14(i32 %x) {
; CHECK-LABEL: @nabs_abs_x14(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1125,9 +1243,10 @@ define i32 @nabs_abs_x14(i32 %x) {
define i32 @nabs_abs_x15(i32 %x) {
; CHECK-LABEL: @nabs_abs_x15(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 0
%sub = sub nsw i32 0, %x
@@ -1140,9 +1259,10 @@ define i32 @nabs_abs_x15(i32 %x) {
define i32 @nabs_abs_x16(i32 %x) {
; CHECK-LABEL: @nabs_abs_x16(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp slt i32 %x, 1
%sub = sub nsw i32 0, %x
@@ -1156,9 +1276,10 @@ define i32 @nabs_abs_x16(i32 %x) {
; nabs(abs(-x)) -> nabs(-x) -> nabs(x)
define i32 @nabs_abs_x17(i32 %x) {
; CHECK-LABEL: @nabs_abs_x17(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[SUB16]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub nsw i32 0, %x
%cmp = icmp sgt i32 %sub, -1
@@ -1173,9 +1294,10 @@ define i32 @nabs_abs_x17(i32 %x) {
define i32 @nabs_abs_x18(i32 %x, i32 %y) {
; CHECK-LABEL: @nabs_abs_x18(
; CHECK-NEXT: [[A:%.*]] = sub nsw i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
-; CHECK-NEXT: [[COND18:%.*]] = sub nsw i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[COND18]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[NEGA]]
+; CHECK-NEXT: ret i32 [[COND]]
;
%a = sub nsw i32 %x, %y
%b = sub nsw i32 %y, %x
@@ -1190,9 +1312,10 @@ define i32 @nabs_abs_x18(i32 %x, i32 %y) {
; nabs(abs(-x)) -> nabs(-x) -> nabs(x)
define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @nabs_abs_x01_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: [[SUB16:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]]
-; CHECK-NEXT: ret <2 x i32> [[SUB16]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[X]], <2 x i32> [[SUB]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
@@ -1207,9 +1330,10 @@ define <2 x i32> @nabs_abs_x01_vec(<2 x i32> %x) {
define <2 x i32> @nabs_abs_x02_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @nabs_abs_x02_vec(
; CHECK-NEXT: [[A:%.*]] = sub nsw <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[A]], i1 false)
-; CHECK-NEXT: [[COND18:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP1]]
-; CHECK-NEXT: ret <2 x i32> [[COND18]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[A]], zeroinitializer
+; CHECK-NEXT: [[NEGA:%.*]] = sub <2 x i32> zeroinitializer, [[A]]
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[A]], <2 x i32> [[NEGA]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%a = sub nsw <2 x i32> %x, %y
%b = sub nsw <2 x i32> %y, %x
diff --git a/llvm/test/Transforms/InstCombine/call-callconv.ll b/llvm/test/Transforms/InstCombine/call-callconv.ll
index 58a0cf21b24e..0cb2c55f9fda 100644
--- a/llvm/test/Transforms/InstCombine/call-callconv.ll
+++ b/llvm/test/Transforms/InstCombine/call-callconv.ll
@@ -6,8 +6,10 @@
define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
; CHECK-LABEL: @_abs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]]
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone
ret i32 %call
@@ -17,8 +19,10 @@ declare arm_aapcscc i32 @abs(i32) nounwind readnone
define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone {
; CHECK-LABEL: @_labs(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[I:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[I:%.*]], 0
+; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[I]]
+; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[NEG]], i32 [[I]]
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone
ret i32 %call
diff --git a/llvm/test/Transforms/InstCombine/cttz-abs.ll b/llvm/test/Transforms/InstCombine/cttz-abs.ll
index ea536f22f14b..b89a55c8f5b8 100644
--- a/llvm/test/Transforms/InstCombine/cttz-abs.ll
+++ b/llvm/test/Transforms/InstCombine/cttz-abs.ll
@@ -105,8 +105,10 @@ define i64 @cttz_abs_64(i64 %x) {
define i32 @cttz_abs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_abs_multiuse(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
-; CHECK-NEXT: call void @use_abs(i32 [[TMP1]])
+; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
;
@@ -120,8 +122,9 @@ define i32 @cttz_abs_multiuse(i32 %x) {
define i32 @cttz_nabs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_nabs_multiuse(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
-; CHECK-NEXT: [[D:%.*]] = sub i32 0, [[TMP1]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), [[RNG0]]
; CHECK-NEXT: ret i32 [[R]]
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index da2161a0bc9f..683518121789 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -2996,8 +2996,10 @@ define i32 @f5(i8 %a, i8 %b) {
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV3:%.*]] = zext i8 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[SUB]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0
+; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]]
+; CHECK-NEXT: [[SUB7_SUB:%.*]] = select i1 [[CMP4]], i32 [[SUB7]], i32 [[SUB]]
+; CHECK-NEXT: ret i32 [[SUB7_SUB]]
;
%conv = zext i8 %a to i32
%conv3 = zext i8 %b to i32
@@ -3591,8 +3593,10 @@ define i1 @knownbits8(i8 %a, i8 %b) {
define i32 @abs_preserve(i32 %x) {
; CHECK-LABEL: @abs_preserve(
; CHECK-NEXT: [[A:%.*]] = shl nsw i32 [[X:%.*]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[A]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NEGA:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[C]], i32 [[NEGA]], i32 [[A]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%a = mul nsw i32 %x, 2
%c = icmp sge i32 %a, 0
@@ -3630,8 +3634,10 @@ define <2 x i1> @PR36583(<2 x i8*>) {
; fold (icmp pred (sub (0, X)) C1) for vec type
define <2 x i32> @Op1Negated_Vec(<2 x i32> %x) {
; CHECK-LABEL: @Op1Negated_Vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[X]], zeroinitializer
+; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> [[X]]
+; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub nsw <2 x i32> zeroinitializer, %x
%cmp = icmp sgt <2 x i32> %sub, <i32 -1, i32 -1>
diff --git a/llvm/test/Transforms/InstCombine/max-of-nots.ll b/llvm/test/Transforms/InstCombine/max-of-nots.ll
index 1b551f9f9b51..e6649d70946b 100644
--- a/llvm/test/Transforms/InstCombine/max-of-nots.ll
+++ b/llvm/test/Transforms/InstCombine/max-of-nots.ll
@@ -240,10 +240,12 @@ define i32 @abs_of_min_of_not(i32 %x, i32 %y) {
; CHECK-LABEL: @abs_of_min_of_not(
; CHECK-NEXT: [[XORD:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[YADD:%.*]] = add i32 [[Y:%.*]], 2
-; CHECK-NEXT: [[COND_I_NOT:%.*]] = icmp slt i32 [[YADD]], [[XORD]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I_NOT]], i32 [[YADD]], i32 [[XORD]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[MIN]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[COND_I:%.*]] = icmp slt i32 [[YADD]], [[XORD]]
+; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I]], i32 [[YADD]], i32 [[XORD]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[MIN]], 0
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[MIN]]
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP2]], i32 [[SUB]], i32 [[MIN]]
+; CHECK-NEXT: ret i32 [[ABS]]
;
%xord = xor i32 %x, -1
diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll
index 8d44774cbe49..67dd246c0408 100644
--- a/llvm/test/Transforms/InstCombine/select_meta.ll
+++ b/llvm/test/Transforms/InstCombine/select_meta.ll
@@ -104,8 +104,10 @@ define i16 @t7(i32 %a) {
define i32 @abs_nabs_x01(i32 %x) {
; CHECK-LABEL: @abs_nabs_x01(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, %x
+; CHECK-NEXT: [[COND1:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 %x, !prof ![[$MD3:[0-9]+]]
+; CHECK-NEXT: ret i32 [[COND1]]
;
%cmp = icmp sgt i32 %x, -1
%sub = sub nsw i32 0, %x
@@ -120,8 +122,10 @@ define i32 @abs_nabs_x01(i32 %x) {
define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; CHECK-LABEL: @abs_nabs_x01_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.abs.v2i32(<2 x i32> [[X:%.*]], i1 true)
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> %x, zeroinitializer
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
+; CHECK-NEXT: [[COND1:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x, !prof ![[$MD3]]
+; CHECK-NEXT: ret <2 x i32> [[COND1]]
;
%cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
%sub = sub nsw <2 x i32> zeroinitializer, %x
@@ -150,7 +154,7 @@ define i32 @test30(i32 %x, i32 %y) {
define i32 @test70(i32 %x) {
; CHECK-LABEL: @test70(
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %x, 75
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD3:[0-9]+]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[$MD3]]
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp = icmp slt i32 %x, 75
diff --git a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
index f14ae09e93bf..0755ebfff162 100644
--- a/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
+++ b/llvm/test/Transforms/InstCombine/sub-of-negatible.ll
@@ -1155,8 +1155,9 @@ define i8 @negate_abs(i8 %x, i8 %y) {
; CHECK-LABEL: @negate_abs(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
-; CHECK-NEXT: [[T3:%.*]] = sub i8 [[Y:%.*]], [[TMP1]]
+; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[X]], i8 [[T0]], !prof !0
+; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret i8 [[T3]]
;
%t0 = sub i8 0, %x
@@ -1170,7 +1171,8 @@ define i8 @negate_nabs(i8 %x, i8 %y) {
; CHECK-LABEL: @negate_nabs(
; CHECK-NEXT: [[T0:%.*]] = sub i8 0, [[X:%.*]]
; CHECK-NEXT: call void @use8(i8 [[T0]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X]], i1 false)
+; CHECK-NEXT: [[T1:%.*]] = icmp slt i8 [[X]], 0
+; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[T1]], i8 [[T0]], i8 [[X]], !prof !0
; CHECK-NEXT: [[T3:%.*]] = add i8 [[TMP1]], [[Y:%.*]]
; CHECK-NEXT: ret i8 [[T3]]
;
diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
index 4610febfdd3d..cf01ead15b0e 100644
--- a/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
+++ b/llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
@@ -71,10 +71,12 @@ define i32 @TestVectorsEqual(i32* noalias %Vec0, i32* noalias %Vec1, i32 %Tolera
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[VEC1:%.*]] to <4 x i32>*
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = sub nsw <4 x i32> [[TMP1]], [[TMP3]]
-; CHECK-NEXT: [[TMP5:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[TMP4]], i1 true)
-; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> [[TMP5]])
-; CHECK-NEXT: [[CMP5_NOT:%.*]] = icmp sle i32 [[TMP6]], [[TOLERANCE:%.*]]
-; CHECK-NEXT: [[COND6:%.*]] = zext i1 [[CMP5_NOT]] to i32
+; CHECK-NEXT: [[TMP5:%.*]] = icmp slt <4 x i32> [[TMP4]], zeroinitializer
+; CHECK-NEXT: [[TMP6:%.*]] = sub nsw <4 x i32> zeroinitializer, [[TMP4]]
+; CHECK-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP5]], <4 x i32> [[TMP6]], <4 x i32> [[TMP4]]
+; CHECK-NEXT: [[TMP8:%.*]] = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> [[TMP7]])
+; CHECK-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TOLERANCE:%.*]]
+; CHECK-NEXT: [[COND6:%.*]] = zext i1 [[CMP5]] to i32
; CHECK-NEXT: ret i32 [[COND6]]
;
entry:
@@ -132,8 +134,8 @@ define i32 @TestVectorsEqual_alt(i32* noalias %Vec0, i32* noalias %Vec1, i32 %To
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = sub <4 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> [[TMP4]])
-; CHECK-NEXT: [[CMP3_NOT:%.*]] = icmp ule i32 [[TMP5]], [[TOLERANCE:%.*]]
-; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP3_NOT]] to i32
+; CHECK-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP5]], [[TOLERANCE:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = zext i1 [[CMP3]] to i32
; CHECK-NEXT: ret i32 [[COND]]
;
entry:
diff --git a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll
index b94cabc780dd..bdf75ca7e82e 100644
--- a/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll
+++ b/llvm/test/Transforms/PhaseOrdering/min-max-abs-cse.ll
@@ -33,8 +33,10 @@ define i8 @smax_nsw(i8 %a, i8 %b) {
define i8 @abs_swapped(i8 %a) {
; CHECK-LABEL: @abs_swapped(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[NEG]], i8 [[A]]
+; CHECK-NEXT: ret i8 [[M1]]
;
%neg = sub i8 0, %a
%cmp1 = icmp sgt i8 %a, 0
@@ -79,8 +81,9 @@ define i8 @abs_
diff erent_constants(i8 %a) {
define i8 @nabs_
diff erent_constants(i8 %a) {
; CHECK-LABEL: @nabs_
diff erent_constants(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[A:%.*]], i1 false)
-; CHECK-NEXT: [[M1:%.*]] = sub i8 0, [[TMP1]]
+; CHECK-NEXT: [[NEG:%.*]] = sub i8 0, [[A:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i8 [[A]], 0
+; CHECK-NEXT: [[M1:%.*]] = select i1 [[CMP1]], i8 [[A]], i8 [[NEG]]
; CHECK-NEXT: ret i8 [[M1]]
;
%neg = sub i8 0, %a
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