[PATCH] D85599: [PowerPC] Remove isTerminator for TRAP instruction

ChenZheng via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Aug 10 19:40:01 PDT 2020


shchenz added a comment.

With this change, we get verify failure for below case:

  int test_builtin_trap(int num) {
    volatile int i = 0;
    if (num > 0)
    __builtin_unreachable();
    else
     goto L1;
  L1:
    return i;
  }



  clang t.c -target powerpc-unknown-unknown  -c -mllvm -verify-machineinstrs -mllvm -trap-unreachable=true



  *** Bad machine code: MBB exits via unconditional fall-through but ends with a barrier instruction! *** 
  - function:    test_builtin_trap
  - basic block: %bb.1 if.then (0x1001f837b50)
  fatal error: error in backend: Found 1 machine code errors.

IR `unreachable` instruction is an IR level terminator, and it will be selected to `TRAP` in selectiondagbuilder, is it ok to change `TRAP` to non-terminator on PowerPC. If above case is valid, I think the answer is no.

There is no `TRAP` in IR level, I guess this is the reason why IR verifier does not complain. Setting `llvm.trap` as terminator seems also not right, because on some targets, it sets `ISD::TRAP` to non-terminator on purpose. See https://reviews.llvm.org/rL278144.

When selected `Intrinsic::trap` to `ISD::TRAP`, updating the BB info according to `TRAP` is a terminator or not on specific target? If `TRAP` is terminator, add a new BB, if it is not, do nothing? I am not sure.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85599/new/

https://reviews.llvm.org/D85599



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