[clang] c4e5743 - [PowerPC] Implement low-order Vector Modulus Builtins, and add Vector Multiply/Divide/Modulus Builtins Tests
Amy Kwan via cfe-commits
cfe-commits at lists.llvm.org
Fri Jul 31 09:15:56 PDT 2020
Author: Amy Kwan
Date: 2020-07-31T10:58:07-05:00
New Revision: c4e574323210feda1a3988e85fdd93b90a63d1b1
URL: https://github.com/llvm/llvm-project/commit/c4e574323210feda1a3988e85fdd93b90a63d1b1
DIFF: https://github.com/llvm/llvm-project/commit/c4e574323210feda1a3988e85fdd93b90a63d1b1.diff
LOG: [PowerPC] Implement low-order Vector Modulus Builtins, and add Vector Multiply/Divide/Modulus Builtins Tests
Power10 introduces new instructions for vector multiply, divide and modulus.
These instructions can be exploited by the builtin functions: vec_mul, vec_div,
and vec_mod, respectively.
This patch aims adds the function prototype, vec_mod, as vec_mul and vec_div
been previously implemented in altivec.h.
This patch also adds the following front end tests:
vec_mul for v2i64
vec_div for v4i32 and v2i64
vec_mod for v4i32 and v2i64
Differential Revision: https://reviews.llvm.org/D82576
Added:
Modified:
clang/lib/Headers/altivec.h
clang/test/CodeGen/builtins-ppc-p10vector.c
Removed:
################################################################################
diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h
index 4e25ec118072..f42200f5bd4e 100644
--- a/clang/lib/Headers/altivec.h
+++ b/clang/lib/Headers/altivec.h
@@ -16933,6 +16933,28 @@ vec_cnttzm(vector unsigned long long __a, vector unsigned long long __b) {
return __builtin_altivec_vctzdm(__a, __b);
}
+/* vec_mod */
+
+static __inline__ vector signed int __ATTRS_o_ai
+vec_mod(vector signed int __a, vector signed int __b) {
+ return __a % __b;
+}
+
+static __inline__ vector unsigned int __ATTRS_o_ai
+vec_mod(vector unsigned int __a, vector unsigned int __b) {
+ return __a % __b;
+}
+
+static __inline__ vector signed long long __ATTRS_o_ai
+vec_mod(vector signed long long __a, vector signed long long __b) {
+ return __a % __b;
+}
+
+static __inline__ vector unsigned long long __ATTRS_o_ai
+vec_mod(vector unsigned long long __a, vector unsigned long long __b) {
+ return __a % __b;
+}
+
/* vec_sldbi */
#define vec_sldb(__a, __b, __c) __builtin_altivec_vsldbi(__a, __b, (__c & 0x7))
diff --git a/clang/test/CodeGen/builtins-ppc-p10vector.c b/clang/test/CodeGen/builtins-ppc-p10vector.c
index e67018b06214..571d33d34a22 100644
--- a/clang/test/CodeGen/builtins-ppc-p10vector.c
+++ b/clang/test/CodeGen/builtins-ppc-p10vector.c
@@ -25,6 +25,66 @@ unsigned char uca;
unsigned short usa;
unsigned long long ulla;
+vector signed long long test_vec_mul_sll(void) {
+ // CHECK: mul <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_mul(vslla, vsllb);
+}
+
+vector unsigned long long test_vec_mul_ull(void) {
+ // CHECK: mul <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_mul(vulla, vullb);
+}
+
+vector signed int test_vec_div_si(void) {
+ // CHECK: sdiv <4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_div(vsia, vsib);
+}
+
+vector unsigned int test_vec_div_ui(void) {
+ // CHECK: udiv <4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_div(vuia, vuib);
+}
+
+vector signed long long test_vec_div_sll(void) {
+ // CHECK: sdiv <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_div(vslla, vsllb);
+}
+
+vector unsigned long long test_vec_div_ull(void) {
+ // CHECK: udiv <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_div(vulla, vullb);
+}
+
+vector signed int test_vec_mod_si(void) {
+ // CHECK: srem <4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_mod(vsia, vsib);
+}
+
+vector unsigned int test_vec_mod_ui(void) {
+ // CHECK: urem <4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_mod(vuia, vuib);
+}
+
+vector signed long long test_vec_mod_sll(void) {
+ // CHECK: srem <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_mod(vslla, vsllb);
+}
+
+vector unsigned long long test_vec_mod_ull(void) {
+ // CHECK: urem <2 x i64>
+ // CHECK-NEXT: ret <2 x i64>
+ return vec_mod(vulla, vullb);
+}
+
vector unsigned long long test_vpdepd(void) {
// CHECK: @llvm.ppc.altivec.vpdepd(<2 x i64>
// CHECK-NEXT: ret <2 x i64>
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