[PATCH] D84820: [WebAssembly] Implement prototype v128.load{32,64}_zero instructions
Thomas Lively via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jul 30 17:42:15 PDT 2020
tlively added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsWebAssembly.td:198
+ [LLVMPointerType<llvm_i32_ty>],
+ [IntrReadMem, IntrArgMemOnly, IntrSpeculatable],
+ "", [SDNPMemOperand]>;
----------------
aheejin wrote:
> Can memory accesses be speculatable? The below too
Hmm, maybe not, and it's definitely move conservative for them not to be.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D84820/new/
https://reviews.llvm.org/D84820
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