[PATCH] D84820: [WebAssembly] Implement prototype v128.load{32,64}_zero instructions
Heejin Ahn via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jul 30 01:50:10 PDT 2020
aheejin accepted this revision.
aheejin added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/include/llvm/IR/IntrinsicsWebAssembly.td:198
+ [LLVMPointerType<llvm_i32_ty>],
+ [IntrReadMem, IntrArgMemOnly, IntrSpeculatable],
+ "", [SDNPMemOperand]>;
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Can memory accesses be speculatable? The below too
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D84820/new/
https://reviews.llvm.org/D84820
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