[PATCH] D83551: [PATCH 2/4][Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

[Cullen Rhodes via Phabricator via cfe-commits]

c-rhodes added inline comments.


================
Comment at: clang/lib/AST/ASTContext.cpp:1887
+
+unsigned getSvePredWidth(const Type *T) { return getSveVectorWidth(T) / 8; }
+
----------------
aaron.ballman wrote:
> Should this be dividing by the number of bits in a char for the target as opposed to hard-coding to 8?
> Should this be dividing by the number of bits in a char for the target as opposed to hard-coding to 8?

Predicate registers in SVE hold one bit per byte of a vector register so each predicate is 1/8th the size of a vector which are defined in bits, it has to be 8 and I know `getCharWidth` returns 8 for the target this is implemented for but I dont know what it would mean for any other target or if we care about that?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83551/new/

https://reviews.llvm.org/D83551