[PATCH] D83088: Introduce CfgTraits abstraction

[Matt Arsenault via Phabricator via cfe-commits]

arsenm added inline comments.


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Comment at: llvm/include/llvm/CodeGen/MachineCfgTraits.h:44
+    // use on a 32-bit architecture.
+    assert(wrapped != (uintptr_t)-1 && wrapped != (uintptr_t)-2);
+
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I feel like there should be a better way to do this; we should probably have an assert where virtual registers are created


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Comment at: llvm/include/llvm/CodeGen/MachineCfgTraits.h:101
+      return nullptr;
+    return m_regInfo->getUniqueVRegDef(value)->getParent();
+  }
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I think regular getVRegDef is preferable for SSA MIR


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83088/new/

https://reviews.llvm.org/D83088