[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins
Stefan Pintilie via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jul 16 09:14:33 PDT 2020
stefanp added a comment.
Just a few nits for this patch.
================
Comment at: clang/lib/Headers/altivec.h:17158
+static __inline__ vector signed __int128 __ATTRS_o_ai
+vec_sl(vector signed __int128 __a, vector unsigned __int128 __b) {
+ return __builtin_altivec_vslq((vector unsigned __int128) __a, __b);
----------------
nit:
Is this supposed to be `vec_slq`?
================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-shift.ll:10
+
+define dso_local <1 x i128> @test_vec_slq(<1 x i128> %a, <1 x i128> %b) #0 {
+; CHECK-LABEL: test_vec_slq:
----------------
nit:
If you are going to use `#0` you can probably define `attributes #0 = { nounwind }` at the bottom of this file.
================
Comment at: llvm/test/CodeGen/PowerPC/p10-vector-shift.ll:41
+; Function Attrs: nounwind readnone
+declare <1 x i128> @llvm.ppc.altivec.vslq(<1 x i128>, <1 x i128>) #1
+
----------------
nit:
You probably don't need the #1 as it is not defined anyway.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83338/new/
https://reviews.llvm.org/D83338
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