[PATCH] D83338: [PowerPC][Power10] Implemented Vector Shift Builtins
Baptiste Saleil via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jul 9 12:14:17 PDT 2020
bsaleil added a comment.
Shouldn't we have test cases to test `vec_sl`, `vec_sr` and `vec_sra` ?
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Comment at: llvm/include/llvm/IR/IntrinsicsPowerPC.td:800
def int_ppc_altivec_vsrw : PowerPC_Vec_WWW_Intrinsic<"vsrw">;
+def int_ppc_altivec_vsrq : PowerPC_Vec_QQQ_Intrinsic<"vsrq">;
def int_ppc_altivec_vsrab : PowerPC_Vec_BBB_Intrinsic<"vsrab">;
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nit: indentation issue
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Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:919
+
+ def VSLQ : VX1_Int_Ty< 261, "vslq", int_ppc_altivec_vslq, v1i128>;
+ def VSRAQ : VX1_Int_Ty< 773, "vsraq", int_ppc_altivec_vsraq, v1i128>;
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nit: extra spaces before `:` here and in the next two lines
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83338/new/
https://reviews.llvm.org/D83338
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