[PATCH] D83500: [PowerPC][Power10] Implement custom codegen for the vec_replace_elt and vec_replace_unaligned builtins.

[Amy Kwan via Phabricator via cfe-commits]

amyk marked 2 inline comments as done.
amyk added inline comments.


================
Comment at: clang/include/clang/Basic/BuiltinsPPC.def:339
+BUILTIN(__builtin_altivec_vec_replace_elt, "V4UiV4UiULLiIi", "t")
+BUILTIN(__builtin_altivec_vec_replace_unaligned, "V4UiV4UiULLiIi", "t")
 
----------------
I originally intended to implement this like the `xxpermdi` builtin:
```
BUILTIN(__builtin_vsx_xxpermdi, "v.", "t")
```
to use `v.` but I am not able to declare these builtins as void. For now, they're more or less an arbitrary signature that would match `vinsw`. 


================
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:606
+vector float test_vec_replace_elt_f(void) {
+  // CHECK-BE: bitcast float %{{.+}} to i32
+  // CHECK-BE-NEXT: @llvm.ppc.altivec.vinsw(<4 x i32> %{{.+}}, i32 %{{.+}}, i32 8
----------------
I've utilized tests that were from Biplob's original patch (https://reviews.llvm.org/D82359), but added the `bitcasts` to the float/double cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83500/new/

https://reviews.llvm.org/D83500