[PATCH] D82398: [MSAN] Handle x86 {round,min,max}sd intrinsics
Evgenii Stepanov via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Jun 23 15:39:12 PDT 2020
eugenis added inline comments.
================
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:3077
+ Value *LowShadow = IRB.CreateOr(LowA, LowB);
+ Value *Shadow = IRB.CreateInsertElement(Second, LowShadow, IRB.getInt32(0));
+
----------------
guiand wrote:
> eugenis wrote:
> > You probably want to insert in First, not Second.
> >
> > Is the generated code any better if you OR the vectors, and then shuffle to put the top element of First into the top element of the output? That's what LLVM generates if I express this logic in C.
> >
> >
> The codegen is basically identical either way, but if you'd like I can still upload a patch to change these into shufflevector instructions.
This is much better.
Use makeArrayRef({2, 1}).
================
Comment at: llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp:3331
+ // case Intrinsic::x86_avx512_mask_sub_sd_round:
+ // case Intrinsic::x86_avx512_mask_mul_sd_round:
+ // case Intrinsic::x86_avx512_mask_div_sd_round:
----------------
Unrelated change.
================
Comment at: llvm/test/Instrumentation/MemorySanitizer/vector_sd.ll:17
+ ; CHECK: [[OP2VEC_SHADOW:%.+]] = insertelement <2 x i64> <i64 -1, i64 -1>, i64 [[LOWVAL_SHADOW]], i32 0
+ %op2vec = insertelement <2 x double> undef, double %lowval, i32 0
+ ; CHECK: [[OP1VEC_SHADOW:%.+]] = insertelement <2 x i64> <i64 -1, i64 -1>, i64 [[HIVAL_SHADOW]], i32 1
----------------
pass the vectors as arguments, it will make the test case a lot simpler
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82398/new/
https://reviews.llvm.org/D82398
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