[PATCH] D82182: [AArch64][SVE] Add bfloat16 support to perm and select intrinsics
Francesco Petrogalli via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Fri Jun 19 08:38:05 PDT 2020
fpetrogalli added inline comments.
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Comment at: clang/include/clang/Basic/arm_sve.td:1115
+let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in {
+def SVREV_BF16 : SInst<"svrev[_{d}]", "dd", "b", MergeNone, "aarch64_sve_rev">;
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nit: could create a multiclass here like @sdesmalen have done in https://reviews.llvm.org/D82187, seems quite a nice way to keep the definition of the intrinsics together (look for `multiclass StructLoad`, for example)
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Comment at: clang/include/clang/Basic/arm_sve.td:1298
+let ArchGuard = "defined(__ARM_FEATURE_SVE_MATMUL_FP64) && defined(__ARM_FEATURE_SVE_BF16)" in {
+def SVTRN1Q_BF16 : SInst<"svtrn1q[_{d}]", "ddd", "b", MergeNone, "aarch64_sve_trn1q">;
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Same here, could use a multiclass to merge the "regular" intrinsics definition with the BF ones.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82182/new/
https://reviews.llvm.org/D82182
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