[PATCH] D80911: AArch64+ARM: make LLVM consider system registers volatile to prevent unsound optimizations.
Tim Northover via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Jun 1 02:37:50 PDT 2020
t.p.northover created this revision.
Herald added subscribers: danielkiss, jdoerfert, asbirlea, hiraditya, kristof.beyls, mcrosier.
Herald added projects: clang, LLVM.
Some of the system registers readable on AArch64 & ARM platforms return different values with each read (for example a timer counter), these shouldn't be hoisted outside loops or otherwise interfered with, but the normal @llvm.read_register intrinsic is only considered to read memory.
This introduces a separate @llvm.read_volatile_register intrinsic and maps all system-registers on ARM platforms to use it for the __builtin_arm_rsr calls. Registers declared with `asm("r9")` or similar are unaffected.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D80911
Files:
clang/lib/CodeGen/CGBuiltin.cpp
clang/test/CodeGen/builtins-arm.c
clang/test/CodeGen/builtins-arm64.c
llvm/docs/LangRef.rst
llvm/include/llvm/IR/Intrinsics.td
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/Transforms/LICM/read-volatile-register.ll
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