[PATCH] D80294: Add support for vmsumudm

[Ahsan Saghir via Phabricator via cfe-commits]

saghir created this revision.
saghir added reviewers: power-llvm-team, nemanjai, stefanp, amyk, lei, hfinkel, PowerPC.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya.
Herald added projects: clang, LLVM.

This patch adds support for Vector Multiply-Sum Unsigned Doubleword Modulo instruction; vmsumudm. This instruction is available on POWER 9.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80294

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/lib/Target/PowerPC/P9InstrResources.td
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
  llvm/test/MC/PowerPC/ppc64-encoding-vmx.s


Index: llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
===================================================================
--- llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
+++ llvm/test/MC/PowerPC/ppc64-encoding-vmx.s
@@ -366,6 +366,9 @@
 # CHECK-BE: vmsumuhm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x66]
 # CHECK-LE: vmsumuhm 2, 3, 4, 5             # encoding: [0x66,0x21,0x43,0x10]
             vmsumuhm 2, 3, 4, 5
+# CHECK-BE: vmsumudm 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x63]
+# CHECK-LE: vmsumudm 2, 3, 4, 5             # encoding: [0x63,0x21,0x43,0x10]
+            vmsumudm 2, 3, 4, 5
 # CHECK-BE: vmsumuhs 2, 3, 4, 5             # encoding: [0x10,0x43,0x21,0x67]
 # CHECK-LE: vmsumuhs 2, 3, 4, 5             # encoding: [0x67,0x21,0x43,0x10]
             vmsumuhs 2, 3, 4, 5
Index: llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
===================================================================
--- llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
+++ llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
@@ -333,6 +333,9 @@
 # CHECK: vmsumuhm 2, 3, 4, 5             
 0x10 0x43 0x21 0x66
 
+# CHECK: vmsumudm 2, 3, 4, 5
+0x10 0x43 0x21 0x63
+
 # CHECK: vmsumuhs 2, 3, 4, 5             
 0x10 0x43 0x21 0x67
 
Index: llvm/lib/Target/PowerPC/PPCInstrAltivec.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrAltivec.td
+++ llvm/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -614,6 +614,8 @@
                             v4i32, v16i8, v4i32>;
 def VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm,
                             v4i32, v8i16, v4i32>;
+def VMSUMUDM : VA1a_Int_Ty3<35, "vmsumudm", int_ppc_altivec_vmsumudm,
+                            v1i128, v2i64, v1i128>;
 def VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs,
                             v4i32, v8i16, v4i32>;
 
Index: llvm/lib/Target/PowerPC/P9InstrResources.td
===================================================================
--- llvm/lib/Target/PowerPC/P9InstrResources.td
+++ llvm/lib/Target/PowerPC/P9InstrResources.td
@@ -373,6 +373,7 @@
     VMSUMSHS,
     VMSUMUBM,
     VMSUMUHM,
+    VMSUMUDM,
     VMSUMUHS,
     VMULESB,
     VMULESH,
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -574,6 +574,9 @@
   def int_ppc_altivec_vmsumuhm : GCCBuiltin<"__builtin_altivec_vmsumuhm">,
             Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty,
                        llvm_v4i32_ty], [IntrNoMem]>;
+  def int_ppc_altivec_vmsumudm : GCCBuiltin<"__builtin_altivec_vmsumudm">,
+            Intrinsic<[llvm_v1i128_ty], [llvm_v2i64_ty, llvm_v2i64_ty,
+                       llvm_v1i128_ty], [IntrNoMem]>;
   def int_ppc_altivec_vmsumuhs : GCCBuiltin<"__builtin_altivec_vmsumuhs">,
             Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty,
                        llvm_v4i32_ty], [IntrNoMem]>;
Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -84,6 +84,7 @@
 BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "")
 BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "")
 BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "")
+BUILTIN(__builtin_altivec_vmsumudm, "V1ULLLiV2ULLV2ULLV1ULLLi", "")
 BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "")
 BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "")
 BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "")


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