[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

[Diogo N. Sampaio via Phabricator via cfe-commits]

dnsampaio added a comment.

In D75169#1952159 <https://reviews.llvm.org/D75169#1952159>, @pratlucas wrote:

> > Why not just make half as an argument do the right thing for that case?
>
> That would be the ideal approach, but currently there's a limitation on the backend's calling convention lowering that gets in the way.
>  The lowering of calls in `SelectionDAGBuilder` includes a target-independent step that is responsible for spliting or promoting each argument into "legal registers" and takes place before the targets' calling convention lowering.
>  As `f16` is not a legal type on many of the `AAPCS_VFP` targets, it gets promoted to `f32` before the target's lowering code has a chance to define how to handle it.
>  Ideally, this stpe should only take place if lowering calling conventions after type legalization - there's a FIXME there already capturing that -, but that would involve a major rewriting that would impact multiple targets.
>  Inserting a hacky target-dependent fix in this step also didn't look very good.
>  Do you see other alternatives for handling it? If not, which approach would you suggest?


Would it be possible to pass a `half` argument and fix-it-up at `CodeGenPrepare`?


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https://reviews.llvm.org/D75169