[PATCH] D79804: [x86] prevent 64b operands to "r" constrained inline asm for -m32

Tue May 12 14:32:47 PDT 2020

craig.topper added a comment.

I'm trying to catch up here. It looks like gcc has only started complaining about this from maybe version 7 on? And only as a warning?

The LLVM X86 backend used a 32-bit register for 'r' or 'R' on -m32 for 64-bit values. But the backend would fail for 'q' or 'Q' if the frontend check were not there.

Weirdly the backend fails for double with 'Q' in 64-bit mode. But does not fail with 'q' or 'r' or 'R'.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79804/new/

https://reviews.llvm.org/D79804