[clang] 827c8b0 - [SveEmitter] Add builtins for svcntp

[Sander de Smalen via cfe-commits]

Author: Sander de Smalen
Date: 2020-05-07T12:28:18+01:00
New Revision: 827c8b06d33de9d19db8f0c79fb022b4ae815a08

URL: https://github.com/llvm/llvm-project/commit/827c8b06d33de9d19db8f0c79fb022b4ae815a08
DIFF: https://github.com/llvm/llvm-project/commit/827c8b06d33de9d19db8f0c79fb022b4ae815a08.diff

LOG: [SveEmitter] Add builtins for svcntp

Added: 
    clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c

Modified: 
    clang/include/clang/Basic/arm_sve.td

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td
index 3ae2e9e60a61..fc3d6f300b65 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -1158,6 +1158,7 @@ def SVCNTH : SInst<"svcnth", "n", "", MergeNone, "aarch64_sve_cnth", [IsAppendSV
 def SVCNTW : SInst<"svcntw", "n", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone]>;
 def SVCNTD : SInst<"svcntd", "n", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone]>;
 
+def SVCNTP : SInst<"svcntp_{d}",  "nPP", "PcPsPiPl",        MergeNone, "aarch64_sve_cntp">;
 def SVLEN  : SInst<"svlen[_{d}]", "nd",  "csilUcUsUiUlhfd", MergeNone>;
 
 ////////////////////////////////////////////////////////////////////////////////

diff  --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
new file mode 100644
index 000000000000..f0a5f6456033
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c
@@ -0,0 +1,41 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+uint64_t test_svcntp_b8(svbool_t pg, svbool_t op)
+{
+  // CHECK-LABEL: test_svcntp_b8
+  // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %op)
+  // CHECK: ret i64 %[[INTRINSIC]]
+  return svcntp_b8(pg, op);
+}
+
+uint64_t test_svcntp_b16(svbool_t pg, svbool_t op)
+{
+  // CHECK-LABEL: test_svcntp_b16
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[OP:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %op)
+  // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i1> %[[OP]])
+  // CHECK: ret i64 %[[INTRINSIC]]
+  return svcntp_b16(pg, op);
+}
+
+uint64_t test_svcntp_b32(svbool_t pg, svbool_t op)
+{
+  // CHECK-LABEL: test_svcntp_b32
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[OP:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %op)
+  // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i1> %[[OP]])
+  // CHECK: ret i64 %[[INTRINSIC]]
+  return svcntp_b32(pg, op);
+}
+
+uint64_t test_svcntp_b64(svbool_t pg, svbool_t op)
+{
+  // CHECK-LABEL: test_svcntp_b64
+  // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+  // CHECK-DAG: %[[OP:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %op)
+  // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i1> %[[OP]])
+  // CHECK: ret i64 %[[INTRINSIC]]
+  return svcntp_b64(pg, op);
+}