[clang] 1a720d4 - [SveEmitter] Add builtins for various FP operations
Sander de Smalen via cfe-commits
cfe-commits at lists.llvm.org
Fri May 1 09:39:14 PDT 2020
Author: Sander de Smalen
Date: 2020-05-01T17:37:43+01:00
New Revision: 1a720d49dcc2194dedeec90b6e53f2b4fc1df15c
URL: https://github.com/llvm/llvm-project/commit/1a720d49dcc2194dedeec90b6e53f2b4fc1df15c
DIFF: https://github.com/llvm/llvm-project/commit/1a720d49dcc2194dedeec90b6e53f2b4fc1df15c.diff
LOG: [SveEmitter] Add builtins for various FP operations
Unary:
- svexpa, svtmad, svtsmul, svtssel,
svscale, svrecpe, svrecps, svrsqrte,
svrsqrts,
Binary:
- svabd, svadd, svdiv, svdivr,
svmin, svmax, svminnm, svmaxnm,
svmul, svmulx, svsub, svsubr,
svmul_lane
Complex:
- svcadd, svcmla
Added:
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mul.c
Modified:
clang/include/clang/Basic/arm_sve.td
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c
clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c
clang/utils/TableGen/SveEmitter.cpp
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td
index 5eaeadeb06d3..c794441dbc34 100644
--- a/clang/include/clang/Basic/arm_sve.td
+++ b/clang/include/clang/Basic/arm_sve.td
@@ -74,6 +74,7 @@
// w: vector of element type promoted to 64bits, vector maintains
// signedness of its element type.
// j: element type promoted to 64bits (splat to vector type)
+// K: element type bitcast to a signed integer (splat to vector type)
// i: constant uint64_t
// k: int32_t
// l: int64_t
@@ -786,7 +787,41 @@ defm SVREVW : SInstZPZ<"svrevw", "lUl", "aarch64_sve_revw">;
defm SVABS_F : SInstZPZ<"svabs", "hfd", "aarch64_sve_fabs">;
defm SVNEG_F : SInstZPZ<"svneg", "hfd", "aarch64_sve_fneg">;
+defm SVABD_F : SInstZPZZ<"svabd", "hfd", "aarch64_sve_fabd">;
+defm SVADD_F : SInstZPZZ<"svadd", "hfd", "aarch64_sve_fadd">;
+defm SVDIV_F : SInstZPZZ<"svdiv", "hfd", "aarch64_sve_fdiv">;
+defm SVDIVR_F : SInstZPZZ<"svdivr", "hfd", "aarch64_sve_fdivr">;
+defm SVMAX_F : SInstZPZZ<"svmax", "hfd", "aarch64_sve_fmax">;
+defm SVMAXNM : SInstZPZZ<"svmaxnm","hfd", "aarch64_sve_fmaxnm">;
+defm SVMIN_F : SInstZPZZ<"svmin", "hfd", "aarch64_sve_fmin">;
+defm SVMINNM : SInstZPZZ<"svminnm","hfd", "aarch64_sve_fminnm">;
+defm SVMUL_F : SInstZPZZ<"svmul", "hfd", "aarch64_sve_fmul">;
+defm SVMULX : SInstZPZZ<"svmulx", "hfd", "aarch64_sve_fmulx">;
+defm SVSUB_F : SInstZPZZ<"svsub", "hfd", "aarch64_sve_fsub">;
+defm SVSUBR_F : SInstZPZZ<"svsubr", "hfd", "aarch64_sve_fsubr">;
+
+defm SVRECPX : SInstZPZ<"svrecpx", "hfd", "aarch64_sve_frecpx">;
+defm SVRINTA : SInstZPZ<"svrinta", "hfd", "aarch64_sve_frinta">;
+defm SVRINTI : SInstZPZ<"svrinti", "hfd", "aarch64_sve_frinti">;
+defm SVRINTM : SInstZPZ<"svrintm", "hfd", "aarch64_sve_frintm">;
+defm SVRINTN : SInstZPZ<"svrintn", "hfd", "aarch64_sve_frintn">;
+defm SVRINTP : SInstZPZ<"svrintp", "hfd", "aarch64_sve_frintp">;
+defm SVRINTX : SInstZPZ<"svrintx", "hfd", "aarch64_sve_frintx">;
+defm SVRINTZ : SInstZPZ<"svrintz", "hfd", "aarch64_sve_frintz">;
+defm SVSQRT : SInstZPZ<"svsqrt", "hfd", "aarch64_sve_fsqrt">;
+
+def SVEXPA : SInst<"svexpa[_{d}]", "du", "hfd", MergeNone, "aarch64_sve_fexpa_x">;
def SVTMAD : SInst<"svtmad[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_ftmad_x", [], [ImmCheck<2, ImmCheck0_7>]>;
+def SVTSMUL : SInst<"svtsmul[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftsmul_x">;
+def SVTSSEL : SInst<"svtssel[_{d}]", "ddu", "hfd", MergeNone, "aarch64_sve_ftssel_x">;
+
+def SVSCALE_M : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeOp1, "aarch64_sve_fscale">;
+def SVSCALE_X : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeAny, "aarch64_sve_fscale">;
+def SVSCALE_Z : SInst<"svscale[_{d}]", "dPdx", "hfd", MergeZero, "aarch64_sve_fscale">;
+
+def SVSCALE_N_M : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeOp1, "aarch64_sve_fscale">;
+def SVSCALE_N_X : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeAny, "aarch64_sve_fscale">;
+def SVSCALE_N_Z : SInst<"svscale[_n_{d}]", "dPdK", "hfd", MergeZero, "aarch64_sve_fscale">;
defm SVMAD_F : SInstZPZZZ<"svmad", "hfd", "aarch64_sve_fmad">;
defm SVMLA_F : SInstZPZZZ<"svmla", "hfd", "aarch64_sve_fmla">;
@@ -797,10 +832,24 @@ defm SVNMLA_F : SInstZPZZZ<"svnmla", "hfd", "aarch64_sve_fnmla">;
defm SVNMLS_F : SInstZPZZZ<"svnmls", "hfd", "aarch64_sve_fnmls">;
defm SVNMSB_F : SInstZPZZZ<"svnmsb", "hfd", "aarch64_sve_fnmsb">;
+def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>;
+def SVCADD_X : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeAny, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>;
+def SVCADD_Z : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeZero, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>;
+def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>;
+def SVCMLA_X : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeAny, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>;
+def SVCMLA_Z : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeZero, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>;
+
def SVCMLA_LANE : SInst<"svcmla_lane[_{d}]", "ddddii", "hf", MergeNone, "aarch64_sve_fcmla_lane", [], [ImmCheck<3, ImmCheckLaneIndexCompRotate, 2>,
ImmCheck<4, ImmCheckComplexRotAll90>]>;
def SVMLA_LANE : SInst<"svmla_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmla_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>;
def SVMLS_LANE : SInst<"svmls_lane[_{d}]", "ddddi", "hfd", MergeNone, "aarch64_sve_fmls_lane", [], [ImmCheck<3, ImmCheckLaneIndex, 2>]>;
+def SVMUL_LANE : SInst<"svmul_lane[_{d}]", "dddi", "hfd", MergeNone, "aarch64_sve_fmul_lane", [], [ImmCheck<2, ImmCheckLaneIndex, 1>]>;
+
+def SVRECPE : SInst<"svrecpe[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frecpe_x">;
+def SVRECPS : SInst<"svrecps[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frecps_x">;
+def SVRSQRTE : SInst<"svrsqrte[_{d}]", "dd", "hfd", MergeNone, "aarch64_sve_frsqrte_x">;
+def SVRSQRTS : SInst<"svrsqrts[_{d}]", "ddd", "hfd", MergeNone, "aarch64_sve_frsqrts_x">;
+
////////////////////////////////////////////////////////////////////////////////
// Floating-point comparisons
@@ -928,9 +977,6 @@ def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch6
}
-def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>;
-def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>;
-
////////////////////////////////////////////////////////////////////////////////
// Permutations and selection
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
index 970dc2f23405..6534d89fb453 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c
@@ -469,3 +469,180 @@ svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svabd,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svabd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svabd_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svabd_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svabd_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svabd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svabd_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svabd_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svabd_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svabd_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svabd_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svabd_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svabd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svabd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svabd_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svabd,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
index 2404b0a8c40e..4d9afd56acb7 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c
@@ -469,3 +469,180 @@ svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svadd,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svadd_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svadd_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svadd_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svadd_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svadd_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svadd_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svadd_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svadd_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svadd_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svadd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svadd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svadd_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svadd,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
new file mode 100644
index 000000000000..16319796c4be
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c
@@ -0,0 +1,105 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 90)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 90);
+}
+
+svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f16_z_1
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, i32 270)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 270);
+}
+
+svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2, i32 90)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f32,_z,)(pg, op1, op2, 90);
+}
+
+svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2, i32 90)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f64,_z,)(pg, op1, op2, 90);
+}
+
+svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f16,_m,)(pg, op1, op2, 90);
+}
+
+svfloat32_t test_svcadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f32,_m,)(pg, op1, op2, 90);
+}
+
+svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f64,_m,)(pg, op1, op2, 90);
+}
+
+svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 90)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f16,_x,)(pg, op1, op2, 90);
+}
+
+svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 90)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f32,_x,)(pg, op1, op2, 90);
+}
+
+svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svcadd_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 90)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcadd,_f64,_x,)(pg, op1, op2, 90);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
index 454d834d23bd..29c86bb08b88 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c
@@ -10,6 +10,66 @@
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
+svfloat16_t test_svcmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 0)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 0);
+}
+
+svfloat16_t test_svcmla_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f16_z_1
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 90)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 90);
+}
+
+svfloat16_t test_svcmla_f16_z_2(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f16_z_2
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 180)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 180);
+}
+
+svfloat16_t test_svcmla_f16_z_3(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f16_z_3
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 270)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 270);
+}
+
+svfloat32_t test_svcmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2, <vscale x 4 x float> %op3, i32 0)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f32,_z,)(pg, op1, op2, op3, 0);
+}
+
+svfloat64_t test_svcmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2, <vscale x 2 x double> %op3, i32 90)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f64,_z,)(pg, op1, op2, op3, 90);
+}
+
svfloat16_t test_svcmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
{
// CHECK-LABEL: test_svcmla_f16_m
@@ -37,6 +97,33 @@ svfloat64_t test_svcmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svf
return SVE_ACLE_FUNC(svcmla,_f64,_m,)(pg, op1, op2, op3, 0);
}
+svfloat16_t test_svcmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2, <vscale x 8 x half> %op3, i32 90)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f16,_x,)(pg, op1, op2, op3, 90);
+}
+
+svfloat32_t test_svcmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2, <vscale x 4 x float> %op3, i32 180)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f32,_x,)(pg, op1, op2, op3, 180);
+}
+
+svfloat64_t test_svcmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3)
+{
+ // CHECK-LABEL: test_svcmla_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2, <vscale x 2 x double> %op3, i32 270)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svcmla,_f64,_x,)(pg, op1, op2, op3, 270);
+}
+
svfloat16_t test_svcmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
{
// CHECK-LABEL: test_svcmla_lane_f16
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
index e199e8c12c19..3a78dc222c8a 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c
@@ -245,3 +245,180 @@ svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdiv,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svdiv_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdiv_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdiv_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdiv_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdiv_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdiv,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
index 16a0b363bbd8..2b590b839d9e 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c
@@ -245,3 +245,180 @@ svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svdivr,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svdivr_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svdivr,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
new file mode 100644
index 000000000000..d1432042ec03
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svexpa_f16(svuint16_t op)
+{
+ // CHECK-LABEL: test_svexpa_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fexpa.x.nxv8f16(<vscale x 8 x i16> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svexpa,_f16,,)(op);
+}
+
+svfloat32_t test_svexpa_f32(svuint32_t op)
+{
+ // CHECK-LABEL: test_svexpa_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fexpa.x.nxv4f32(<vscale x 4 x i32> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svexpa,_f32,,)(op);
+}
+
+svfloat64_t test_svexpa_f64(svuint64_t op)
+{
+ // CHECK-LABEL: test_svexpa_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fexpa.x.nxv2f64(<vscale x 2 x i64> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svexpa,_f64,,)(op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
index 0c88d609bbe8..4f91422d2a17 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c
@@ -469,3 +469,179 @@ svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svmax,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svmax_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmax_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmax_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmax_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmax_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmax_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmax_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmax_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmax_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmax_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmax_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmax_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f16_z
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmax_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmax_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmax,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
new file mode 100644
index 000000000000..5e873b01e50c
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c
@@ -0,0 +1,187 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f16_z
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmaxnm_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
index 3b237d9dc0d8..bdf7ae02af18 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c
@@ -469,3 +469,179 @@ svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svmin,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svmin_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmin_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmin_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmin_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmin_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmin_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmin_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmin_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmin_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmin_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmin_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmin_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f16_z
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmin_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmin_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmin,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
new file mode 100644
index 000000000000..9f4f445efeeb
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c
@@ -0,0 +1,187 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svminnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svminnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svminnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f16_z
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svminnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svminnm_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svminnm,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
index b4a9f0cdfc9e..bc76e4754bec 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c
@@ -469,3 +469,228 @@ svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svmul,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svmul_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmul_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmul_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmul_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmul_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmul_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmul_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmul_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmul_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmul_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmul_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul,_n_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 0)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 0);
+}
+
+svfloat16_t test_svmul_lane_f16_1(svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f16_1
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x half> %op2, i32 7)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 7);
+}
+
+svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 0)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 0);
+}
+
+svfloat32_t test_svmul_lane_f32_1(svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f32_1
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x float> %op2, i32 3)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 3);
+}
+
+svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 0)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 0);
+}
+
+svfloat64_t test_svmul_lane_f64_1(svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmul_lane_f64_1
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x double> %op2, i32 1)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 1);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
new file mode 100644
index 000000000000..e485d8a720fe
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c
@@ -0,0 +1,188 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svmulx_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmulx_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmulx_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmulx_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svmulx_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svmulx,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
new file mode 100644
index 000000000000..f3ee6f4769ae
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrecpe_f16(svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrecpe_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frecpe.x.nxv8f16(<vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpe,_f16,,)(op);
+}
+
+svfloat32_t test_svrecpe_f32(svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrecpe_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frecpe.x.nxv4f32(<vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpe,_f32,,)(op);
+}
+
+svfloat64_t test_svrecpe_f64(svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrecpe_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frecpe.x.nxv2f64(<vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpe,_f64,,)(op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
new file mode 100644
index 000000000000..de13a02c64d4
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrecps_f16(svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svrecps_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frecps.x.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecps,_f16,,)(op1, op2);
+}
+
+svfloat32_t test_svrecps_f32(svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svrecps_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frecps.x.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecps,_f32,,)(op1, op2);
+}
+
+svfloat64_t test_svrecps_f64(svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svrecps_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frecps.x.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecps,_f64,,)(op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
new file mode 100644
index 000000000000..7666db7a0d2a
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrecpx_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrecpx_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrecpx_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrecpx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrecpx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrecpx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrecpx_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrecpx_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrecpx_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrecpx_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrecpx,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
new file mode 100644
index 000000000000..cae1f3093a85
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrinta_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinta_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrinta_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinta_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrinta_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinta_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrinta_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinta_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrinta_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinta_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrinta_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinta_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrinta_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinta_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrinta_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinta_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrinta_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinta_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinta,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
new file mode 100644
index 000000000000..a4bf4f97bf4d
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrinti_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinti_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrinti_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinti_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrinti_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinti_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrinti_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinti_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrinti_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinti_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrinti_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinti_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrinti_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrinti_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrinti_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrinti_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrinti_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrinti_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrinti,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
new file mode 100644
index 000000000000..bf04d944f210
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrintm_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintm_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrintm_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintm_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrintm_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintm_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrintm_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintm_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrintm_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintm_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrintm_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintm_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrintm_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintm_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrintm_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintm_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrintm_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintm_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintm,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
new file mode 100644
index 000000000000..772a32bdd20d
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrintn_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintn_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrintn_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintn_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrintn_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintn_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrintn_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintn_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrintn_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintn_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrintn_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintn_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrintn_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintn_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrintn_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintn_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrintn_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintn_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintn,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
new file mode 100644
index 000000000000..f7a1bac06f78
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrintp_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintp_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrintp_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintp_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrintp_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintp_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrintp_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintp_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrintp_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintp_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrintp_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintp_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrintp_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintp_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrintp_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintp_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrintp_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintp_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintp,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
new file mode 100644
index 000000000000..c2504fddbd78
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrintx_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintx_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrintx_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintx_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrintx_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintx_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrintx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintx_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrintx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintx_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrintx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintx_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrintx_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintx_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrintx_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintx_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrintx_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintx_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintx,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
new file mode 100644
index 000000000000..bf780ccc220e
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrintz_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintz_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svrintz_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintz_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svrintz_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintz_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svrintz_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintz_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svrintz_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintz_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svrintz_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintz_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svrintz_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrintz_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svrintz_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrintz_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svrintz_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrintz_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrintz,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
new file mode 100644
index 000000000000..466d2d527a3a
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrsqrte_f16(svfloat16_t op)
+{
+ // CHECK-LABEL: test_svrsqrte_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frsqrte.x.nxv8f16(<vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrte,_f16,,)(op);
+}
+
+svfloat32_t test_svrsqrte_f32(svfloat32_t op)
+{
+ // CHECK-LABEL: test_svrsqrte_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frsqrte.x.nxv4f32(<vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrte,_f32,,)(op);
+}
+
+svfloat64_t test_svrsqrte_f64(svfloat64_t op)
+{
+ // CHECK-LABEL: test_svrsqrte_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frsqrte.x.nxv2f64(<vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrte,_f64,,)(op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
new file mode 100644
index 000000000000..19f7d943ac19
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svrsqrts_f16(svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svrsqrts_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.frsqrts.x.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrts,_f16,,)(op1, op2);
+}
+
+svfloat32_t test_svrsqrts_f32(svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svrsqrts_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.frsqrts.x.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrts,_f32,,)(op1, op2);
+}
+
+svfloat64_t test_svrsqrts_f64(svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svrsqrts_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.frsqrts.x.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svrsqrts,_f64,,)(op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
new file mode 100644
index 000000000000..3b5d3b5502f4
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c
@@ -0,0 +1,188 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svscale_f16_z(svbool_t pg, svfloat16_t op1, svint16_t op2)
+{
+ // CHECK-LABEL: test_svscale_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x i16> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_f32_z(svbool_t pg, svfloat32_t op1, svint32_t op2)
+{
+ // CHECK-LABEL: test_svscale_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x i32> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_f64_z(svbool_t pg, svfloat64_t op1, svint64_t op2)
+{
+ // CHECK-LABEL: test_svscale_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x i64> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svscale_f16_m(svbool_t pg, svfloat16_t op1, svint16_t op2)
+{
+ // CHECK-LABEL: test_svscale_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x i16> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_f32_m(svbool_t pg, svfloat32_t op1, svint32_t op2)
+{
+ // CHECK-LABEL: test_svscale_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x i32> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_f64_m(svbool_t pg, svfloat64_t op1, svint64_t op2)
+{
+ // CHECK-LABEL: test_svscale_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x i64> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svscale_f16_x(svbool_t pg, svfloat16_t op1, svint16_t op2)
+{
+ // CHECK-LABEL: test_svscale_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x i16> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_f32_x(svbool_t pg, svfloat32_t op1, svint32_t op2)
+{
+ // CHECK-LABEL: test_svscale_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x i32> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_f64_x(svbool_t pg, svfloat64_t op1, svint64_t op2)
+{
+ // CHECK-LABEL: test_svscale_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x i64> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svscale_n_f16_z(svbool_t pg, svfloat16_t op1, int16_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_n_f32_z(svbool_t pg, svfloat32_t op1, int32_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_n_f64_z(svbool_t pg, svfloat64_t op1, int64_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svscale_n_f16_m(svbool_t pg, svfloat16_t op1, int16_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x i16> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_n_f32_m(svbool_t pg, svfloat32_t op1, int32_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x i32> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_n_f64_m(svbool_t pg, svfloat64_t op1, int64_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x i64> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svscale_n_f16_x(svbool_t pg, svfloat16_t op1, int16_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x i16> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svscale_n_f32_x(svbool_t pg, svfloat32_t op1, int32_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x i32> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svscale_n_f64_x(svbool_t pg, svfloat64_t op1, int64_t op2)
+{
+ // CHECK-LABEL: test_svscale_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x i64> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svscale,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
new file mode 100644
index 000000000000..3f0cf96cb7a6
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c
@@ -0,0 +1,92 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svsqrt_f16_z(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f16_z
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f16,_z,)(pg, op);
+}
+
+svfloat32_t test_svsqrt_f32_z(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f32_z
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f32,_z,)(pg, op);
+}
+
+svfloat64_t test_svsqrt_f64_z(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f64_z
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f64,_z,)(pg, op);
+}
+
+svfloat16_t test_svsqrt_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f16,_m,)(inactive, pg, op);
+}
+
+svfloat32_t test_svsqrt_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float> %inactive, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f32,_m,)(inactive, pg, op);
+}
+
+svfloat64_t test_svsqrt_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double> %inactive, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f64,_m,)(inactive, pg, op);
+}
+
+svfloat16_t test_svsqrt_f16_x(svbool_t pg, svfloat16_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f16,_x,)(pg, op);
+}
+
+svfloat32_t test_svsqrt_f32_x(svbool_t pg, svfloat32_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f32,_x,)(pg, op);
+}
+
+svfloat64_t test_svsqrt_f64_x(svbool_t pg, svfloat64_t op)
+{
+ // CHECK-LABEL: test_svsqrt_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsqrt,_f64,_x,)(pg, op);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
index 63d6396eb4eb..fdd9767cc765 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c
@@ -469,3 +469,180 @@ svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svsub,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svsub_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsub_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsub_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsub_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsub_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsub_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsub_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsub_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsub_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsub_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsub_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsub_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsub_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsub_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsub,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
index 6931ce309c28..0d8eb5eb98ab 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c
@@ -469,3 +469,180 @@ svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svsubr,_n_u64,_x,)(pg, op1, op2);
}
+
+svfloat16_t test_svsubr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsubr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f16_m
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f32_m
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f64_m
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f16_x
+ // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f32_x
+ // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_f64_x
+ // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_f64,_x,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsubr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f16_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.sel.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %[[SEL]], <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f16,_z,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f32_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.sel.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %[[SEL]], <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f32,_z,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f64_z
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.sel.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> zeroinitializer)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %[[SEL]], <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f64,_z,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsubr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f16_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f16,_m,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f32_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f32,_m,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f64_m
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f64,_m,)(pg, op1, op2);
+}
+
+svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f16_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.dup.x.nxv8f16(half %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x half> %op1, <vscale x 8 x half> %[[DUP]])
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f16,_x,)(pg, op1, op2);
+}
+
+svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f32_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.dup.x.nxv4f32(float %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x float> %op1, <vscale x 4 x float> %[[DUP]])
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f32,_x,)(pg, op1, op2);
+}
+
+svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2)
+{
+ // CHECK-LABEL: test_svsubr_n_f64_x
+ // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
+ // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.dup.x.nxv2f64(double %op2)
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x double> %op1, <vscale x 2 x double> %[[DUP]])
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svsubr,_n_f64,_x,)(pg, op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
new file mode 100644
index 000000000000..1049f8482932
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svtsmul_f16(svfloat16_t op1, svuint16_t op2)
+{
+ // CHECK-LABEL: test_svtsmul_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.ftsmul.x.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x i16> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtsmul,_f16,,)(op1, op2);
+}
+
+svfloat32_t test_svtsmul_f32(svfloat32_t op1, svuint32_t op2)
+{
+ // CHECK-LABEL: test_svtsmul_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ftsmul.x.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x i32> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtsmul,_f32,,)(op1, op2);
+}
+
+svfloat64_t test_svtsmul_f64(svfloat64_t op1, svuint64_t op2)
+{
+ // CHECK-LABEL: test_svtsmul_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ftsmul.x.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x i64> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtsmul,_f64,,)(op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
new file mode 100644
index 000000000000..1c028feb3cfa
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+
+#include <arm_sve.h>
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+svfloat16_t test_svtssel_f16(svfloat16_t op1, svuint16_t op2)
+{
+ // CHECK-LABEL: test_svtssel_f16
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x half> @llvm.aarch64.sve.ftssel.x.nxv8f16(<vscale x 8 x half> %op1, <vscale x 8 x i16> %op2)
+ // CHECK: ret <vscale x 8 x half> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtssel,_f16,,)(op1, op2);
+}
+
+svfloat32_t test_svtssel_f32(svfloat32_t op1, svuint32_t op2)
+{
+ // CHECK-LABEL: test_svtssel_f32
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x float> @llvm.aarch64.sve.ftssel.x.nxv4f32(<vscale x 4 x float> %op1, <vscale x 4 x i32> %op2)
+ // CHECK: ret <vscale x 4 x float> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtssel,_f32,,)(op1, op2);
+}
+
+svfloat64_t test_svtssel_f64(svfloat64_t op1, svuint64_t op2)
+{
+ // CHECK-LABEL: test_svtssel_f64
+ // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x double> @llvm.aarch64.sve.ftssel.x.nxv2f64(<vscale x 2 x double> %op1, <vscale x 2 x i64> %op2)
+ // CHECK: ret <vscale x 2 x double> %[[INTRINSIC]]
+ return SVE_ACLE_FUNC(svtssel,_f64,,)(op1, op2);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c
index 1f68f6b19438..39b1ac318ffd 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c
@@ -10,6 +10,48 @@
#include <arm_sve.h>
+svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 0);
+}
+
+svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 272);
+}
+
+svfloat16_t test_svcadd_f16_z_2(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 91);
+}
+
+svfloat16_t test_svcadd_f16_z_3(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 180);
+}
+
+svfloat16_t test_svcadd_f16_z_4(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 271);
+}
+
+svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f32,_z,)(pg, op1, op2, 0);
+}
+
+svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f64,_z,)(pg, op1, op2, 0);
+}
+
svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
{
// expected-error at +1 {{argument should be the value 90 or 270}}
@@ -27,3 +69,21 @@ svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
// expected-error at +1 {{argument should be the value 90 or 270}}
return SVE_ACLE_FUNC(svcadd,_f64,_m,)(pg, op1, op2, 0);
}
+
+svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f16,_x,)(pg, op1, op2, 0);
+}
+
+svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f32,_x,)(pg, op1, op2, 0);
+}
+
+svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
+{
+ // expected-error at +1 {{argument should be the value 90 or 270}}
+ return SVE_ACLE_FUNC(svcadd,_f64,_x,)(pg, op1, op2, 0);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c
index 94f36260ba37..ae507be46356 100644
--- a/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c
@@ -10,6 +10,48 @@
#include <arm_sve.h>
+svfloat16_t test_svcmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 19);
+}
+
+svfloat16_t test_svcmla_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 1);
+}
+
+svfloat16_t test_svcmla_f16_z_2(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 18);
+}
+
+svfloat16_t test_svcmla_f16_z_3(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 91);
+}
+
+svfloat16_t test_svcmla_f16_z_4(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 181);
+}
+
+svfloat32_t test_svcmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f32,_z,)(pg, op1, op2, op3, 19);
+}
+
+svfloat64_t test_svcmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f64,_z,)(pg, op1, op2, op3, 19);
+}
+
svfloat16_t test_svcmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
{
// expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
@@ -28,6 +70,24 @@ svfloat64_t test_svcmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svf
return SVE_ACLE_FUNC(svcmla,_f64,_m,)(pg, op1, op2, op3, 19);
}
+svfloat16_t test_svcmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f16,_x,)(pg, op1, op2, op3, 19);
+}
+
+svfloat32_t test_svcmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f32,_x,)(pg, op1, op2, op3, 19);
+}
+
+svfloat64_t test_svcmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3)
+{
+ // expected-error at +1 {{argument should be the value 0, 90, 180 or 270}}
+ return SVE_ACLE_FUNC(svcmla,_f64,_x,)(pg, op1, op2, op3, 19);
+}
+
svfloat16_t test_svcmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
{
// expected-error at +1 {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
@@ -105,3 +165,9 @@ svfloat32_t test_svcmla_lane_f32_3(svfloat32_t op1, svfloat32_t op2, svfloat32_t
// expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
return SVE_ACLE_FUNC(svcmla_lane,_f32,,)(op1, op2, op3, 2, 0);
}
+
+svfloat32_t test_svcmla_lane_f32_4(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
+{
+ // expected-error-re at +1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}}
+ return SVE_ACLE_FUNC(svcmla_lane,_f32,,)(op1, op2, op3, 3, 180);
+}
diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mul.c
new file mode 100644
index 000000000000..b8cb87dab999
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mul.c
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
+
+#ifdef SVE_OVERLOADED_FORMS
+// A simple used,unused... macro, long enough to represent any SVE builtin.
+#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
+#else
+#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
+#endif
+
+#include <arm_sve.h>
+
+svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2)
+{
+ // expected-error-re at +1 {{argument value {{[0-9]+}} is outside the valid range [0, 7]}}
+ return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 8);
+}
+
+svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2)
+{
+ // expected-error-re at +1 {{argument value {{[0-9]+}} is outside the valid range [0, 3]}}
+ return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, -1);
+}
+
+svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2)
+{
+ // expected-error-re at +1 {{argument value {{[0-9]+}} is outside the valid range [0, 1]}}
+ return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 2);
+}
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index a83450a76382..bdaeac7ef55f 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -510,6 +510,12 @@ void SVEType::applyModifier(char Mod) {
Bitwidth = ElementBitwidth;
NumVectors = 0;
break;
+ case 'K':
+ Signed = true;
+ Float = false;
+ Bitwidth = ElementBitwidth;
+ NumVectors = 0;
+ break;
case 'u':
Predicate = false;
Signed = false;
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