[clang] 0ed5b0d - [X86] Don't use types when getting the intrinsic declaration for x86_avx512_mask_vcvtph2ps_512.

[Craig Topper via cfe-commits]

Author: Craig Topper
Date: 2020-04-24T11:01:22-07:00
New Revision: 0ed5b0d517cb781d4949cc4bfa9854bc276ee13a

URL: https://github.com/llvm/llvm-project/commit/0ed5b0d517cb781d4949cc4bfa9854bc276ee13a
DIFF: https://github.com/llvm/llvm-project/commit/0ed5b0d517cb781d4949cc4bfa9854bc276ee13a.diff

LOG: [X86] Don't use types when getting the intrinsic declaration for x86_avx512_mask_vcvtph2ps_512.

This intrinsic isn't overloaded so we should query with types.
Doing so causes the backend to miss the intrinsic and not codegen it.
This eventually leads to a linker error.

Added: 
    

Modified: 
    clang/lib/CodeGen/CGBuiltin.cpp
    clang/test/CodeGen/avx512f-builtins.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 3a66583e20e8..18ad1664aa56 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -10961,10 +10961,8 @@ static Value *EmitX86CvtF16ToFloatExpr(CodeGenFunction &CGF,
 
   // If the SAE intrinsic doesn't use default rounding then we can't upgrade.
   if (Ops.size() == 4 && cast<llvm::ConstantInt>(Ops[3])->getZExtValue() != 4) {
-    Intrinsic::ID IID = Intrinsic::x86_avx512_mask_vcvtph2ps_512;
     Function *F =
-        CGF.CGM.getIntrinsic(IID, {DstTy, Ops[0]->getType(), Ops[1]->getType(),
-                                   Ops[2]->getType(), Ops[3]->getType()});
+        CGF.CGM.getIntrinsic(Intrinsic::x86_avx512_mask_vcvtph2ps_512);
     return CGF.Builder.CreateCall(F, {Ops[0], Ops[1], Ops[2], Ops[3]});
   }
 

diff  --git a/clang/test/CodeGen/avx512f-builtins.c b/clang/test/CodeGen/avx512f-builtins.c
index c193e7d3a477..7be73ecbd1cd 100644
--- a/clang/test/CodeGen/avx512f-builtins.c
+++ b/clang/test/CodeGen/avx512f-builtins.c
@@ -4976,21 +4976,21 @@ __m256i test_mm512_maskz_cvt_roundps_ph(__mmask16 __U, __m512  __A)
 __m512 test_mm512_cvt_roundph_ps(__m256i __A)
 {
     // CHECK-LABEL: @test_mm512_cvt_roundph_ps
-    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512
+    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(
     return _mm512_cvt_roundph_ps(__A, _MM_FROUND_NO_EXC);
 }
 
 __m512 test_mm512_mask_cvt_roundph_ps(__m512 __W, __mmask16 __U, __m256i __A)
 {
     // CHECK-LABEL: @test_mm512_mask_cvt_roundph_ps
-    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512
+    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(
     return _mm512_mask_cvt_roundph_ps(__W, __U, __A, _MM_FROUND_NO_EXC);
 }
 
 __m512 test_mm512_maskz_cvt_roundph_ps(__mmask16 __U, __m256i __A)
 {
     // CHECK-LABEL: @test_mm512_maskz_cvt_roundph_ps
-    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512
+    // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.512(
     return _mm512_maskz_cvt_roundph_ps(__U, __A, _MM_FROUND_NO_EXC);
 }