[PATCH] D78252: [AArch64] FMLA/FMLS patterns improvement.

Tue Apr 21 09:10:14 PDT 2020

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks

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Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:8094
                 V128:$Rm, VectorIndexS:$idx)>;
-  def : Pat<(f32 (OpNode (f32 FPR32:$Rd), (f32 FPR32:$Rn),
-                         (vector_extract (v2f32 V64:$Rm), VectorIndexS:$idx))),
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I was a little surprised when you said we could remove these, but it looks like the vector_extract (v2f32) is always converted to a vector_extract (v4f32 insert_subvector (v2f32)). So I agree, seems Ok to remove. (And if we do run into a problem, we can always add it back in).

Repository:
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  https://reviews.llvm.org/D78252/new/

https://reviews.llvm.org/D78252