[PATCH] D77540: [PATCH] [ARM]: Armv8.6-a Matrix Mul Asm and Intrinsics Support

[Luke Geeson via Phabricator via cfe-commits]

LukeGeeson created this revision.
LukeGeeson added a reviewer: ostannard.
Herald added subscribers: cfe-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a reviewer: rengolin.
Herald added a project: clang.

This patch upstreams support for the Armv8.6-a Matrix Multiplication
Extension. A summary of the features can be found here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

This patch includes:

- Assembly support for AArch32, AArch64, NEON, and SVE
- Intrinsics Support for AArch32, AArch64
- Command line options to enable these features with +f32mm or f64mm

Note: these extensions are optional in the 8.6a architecture and so have
to be enabled by default

No IR types or C Types are needed for this extension.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D77540

Files:
  clang/include/clang/Basic/arm_neon.td
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/test/CodeGen/aarch64-v8.6a-neon-intrinsics.c
  clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c
  clang/test/Driver/aarch64-cpus.c
  clang/test/Driver/arm-matrix-multiply.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/include/llvm/IR/IntrinsicsARM.td
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/include/llvm/Support/ARMTargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMInstrNEON.td
  llvm/lib/Target/ARM/ARMPredicates.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/test/CodeGen/AArch64/aarch64-matmul.ll
  llvm/test/CodeGen/ARM/arm-matmul.ll
  llvm/test/MC/AArch64/SVE/matrix-multiply-fp-diagnostics.s
  llvm/test/MC/AArch64/SVE/matrix-multiply-fp32.s
  llvm/test/MC/AArch64/SVE/matrix-multiply-fp64.s
  llvm/test/MC/AArch64/SVE/matrix-multiply-int8-diagnostics.s
  llvm/test/MC/AArch64/SVE/matrix-multiply-int8.s
  llvm/test/MC/AArch64/armv8.6a-simd-matmul-error.s
  llvm/test/MC/AArch64/armv8.6a-simd-matmul.s
  llvm/test/MC/ARM/armv8.6a-matmul-error.s
  llvm/test/MC/ARM/armv8.6a-matmul.s
  llvm/test/MC/Disassembler/AArch64/armv8.6a-simd-matmul.txt
  llvm/test/MC/Disassembler/ARM/armv8.6a-matmul-arm.txt
  llvm/test/MC/Disassembler/ARM/armv8.6a-matmul-thumb.txt
  llvm/unittests/Support/TargetParserTest.cpp

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