[PATCH] D74918: Add method to TargetInfo to get CPU cache line size
Zoe Carver via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sat Mar 21 09:37:30 PDT 2020
zoecarver marked an inline comment as done.
zoecarver added inline comments.
================
Comment at: clang/lib/Basic/Targets/X86.cpp:1786
+ // i386
+ case CK_i386:
+ // Netburst
----------------
craig.topper wrote:
> zoecarver wrote:
> > craig.topper wrote:
> > > I found the documentation for the 82385 cache controller chip for the 386. It's a bit weird. The tags for the cache are based on 16 byte lines, but there are valid bits for every 2 bytes within that line. So its possible for only a portion of a line to be valid.
> > Interesting. Does this mean that we should be returning a different value?
> I think we should make 386 return 16.
Alright. I'll update it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74918/new/
https://reviews.llvm.org/D74918
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