[PATCH] D76122: [ARM,MVE] Add intrinsics and isel for MVE integer VMLA.
Dave Green via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Mar 16 08:08:11 PDT 2020
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14289-14292
case Intrinsic::arm_neon_vqrshifts:
case Intrinsic::arm_neon_vqrshiftu:
// No immediate versions of these to check for.
break;
----------------
I know it's not part of this patch, but what is this code for?
================
Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:5172
+ if scalar_addend then {
+ def : Pat<(VTI.Vec (add (mul v1, v2), vs)), (VTI.Vec (Inst v1, v2, s))>;
+ } else {
----------------
Can you make it so that patterns are:
def : Pat<(VTI.Vec (add (mul v1, v2), vs)),
(VTI.Vec (Inst v1, v2, s))>;
So they are easier to read.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D76122/new/
https://reviews.llvm.org/D76122
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