[PATCH] D75917: Expose llvm fence instruction as clang intrinsic

Sameer Sahasrabuddhe via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Mar 11 08:31:17 PDT 2020


sameerds added a comment.

In D75917#1916664 <https://reviews.llvm.org/D75917#1916664>, @JonChesterfield wrote:

> In D75917#1916160 <https://reviews.llvm.org/D75917#1916160>, @sameerds wrote:
>
> > how this builtin fits in with the overall scheme of language-specific and target-specific details of an atomic operation. For example, is this meant only for OpenCL? Does it work with CUDA? Or HIP? What is the behaviour for scope in C++?
>
>
> Identical to the fence instruction. Which is assumed well thought through already, given it's an IR instruction.
>
> As far as I can tell, fence composes sensibly with other IR then generates the right thing at the back end. So it looks fit for purpose, just not currently available from clang.


Well, there is a problem: The LangRef says that scopes are target-defined. This change says that scopes are defined by the high-level language and further assumes that OpenCL scopes make sense in all languages. Besides conflicting with the LangRef, this not seem to work with C++, which has no scopes and nor with CUDA or HIP, whose scopes are not represented in any AtomicScopeModel.


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  https://reviews.llvm.org/D75917/new/

https://reviews.llvm.org/D75917





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