[PATCH] D75690: [SVE][Inline-Asm] Add constraints for SVE ACLE types

[Kerry McLaughlin via Phabricator via cfe-commits]

kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, huntergr, rovka, cameron.mcinally, efriedma.
Herald added subscribers: cfe-commits, psnobl, rkruppe, tschuett.
Herald added a reviewer: rengolin.
Herald added a project: clang.
kmclaughlin added a parent revision: D75297: [TypeSize] Allow returning scalable size in implicit conversion to uint64_t.

Adds the constraints described below to ensure that we
can tie variables of SVE ACLE types to operands in inline-asm:

- y: SVE registers Z0-Z7
- Upl: One of the low eight SVE predicate registers (P0-P7)
- Upa: Full range of SVE predicate registers (P0-P15)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75690

Files:
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/CodeGen/CGCall.cpp
  clang/lib/CodeGen/CGStmt.cpp
  clang/lib/CodeGen/CodeGenFunction.cpp
  clang/test/CodeGen/aarch64-sve-inline-asm-crash.c
  clang/test/CodeGen/aarch64-sve-inline-asm-datatypes.c
  clang/test/CodeGen/aarch64-sve-inline-asm-negative-test.c
  clang/test/CodeGen/aarch64-sve-inline-asm-vec-low.c

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