[PATCH] D74918: Add method to TargetInfo to get CPU cache line size

[Zoe Carver via Phabricator via cfe-commits]

zoecarver added a comment.

Here's what I think we should do: continue to have this method just return the cache line size. Then have another method that returns `true` or `false` for whether the given architecture supports aligned pairs of cache lines then, users of this (either in clang or libc++) can decide what they want to do.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D74918/new/

https://reviews.llvm.org/D74918