[PATCH] D75169: [ARM] Enforcing calling convention for half-precision FP arguments and returns for big-endian AArch32

[Lucas Prates via Phabricator via cfe-commits]

pratlucas created this revision.
Herald added subscribers: cfe-commits, kristof.beyls.
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Half-precision floating point arguments and returns are currently
promoted to either float or int32 in clang's CodeGen. As such promotions
are implemented as coercion through memory in clang, aruments and
returns of those types end up stored on the wrong bits on big-endian
AArch32 - MSBs instead of LSBs.

This patch enforces AAPCS' directions, making sure clang stores those
types on the proper bits during coercion through memory for bit-endian
targets.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D75169

Files:
  clang/include/clang/CodeGen/CGFunctionInfo.h
  clang/lib/CodeGen/CGCall.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/arm-fp16-arguments.c

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