[PATCH] D74912: [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup
Kerry McLaughlin via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 25 09:21:00 PST 2020
kmclaughlin updated this revision to Diff 246487.
kmclaughlin added a comment.
Addressed review comments:
- Removed SelectTableSVE2 from AArch64ISelDAGToDAG.cpp and added tablegen patterns for the tbl2 intrinsic
- Updated tests to use operands that are not consecutive to ensure that the result is still two consecutive registers
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74912/new/
https://reviews.llvm.org/D74912
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve2-intrinsics-bit-permutation.ll
llvm/test/CodeGen/AArch64/sve2-intrinsics-perm-tb.ll
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