[PATCH] D74734: [AArch64][SVE] Add the SVE dupq_lane intrinsic

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.

LGTM!



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7495
+  // DUPQ can be used when idx is in range.
+  auto CIdx = dyn_cast<ConstantSDNode>(Idx128);
+  if (CIdx && (CIdx->getZExtValue() <= 3)) {
----------------
nit: `auto *CIdx`


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7496
+  auto CIdx = dyn_cast<ConstantSDNode>(Idx128);
+  if (CIdx && (CIdx->getZExtValue() <= 3)) {
+    auto CI = DAG.getTargetConstant(CIdx->getZExtValue(), DL, MVT::i64);
----------------
nit: can you replace `auto` in these cases with SDValue? (which I think this is?)


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:7506
+  //                       index * 2))
+  auto Zero = DAG.getConstant(0, DL, MVT::i64);
+  auto One = DAG.getConstant(1, DL, MVT::i64);
----------------
nit: please move `Zero` down to its use below.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D74734