[PATCH] D74918: Add method to TargetInfo to get CPU cache line size
Zoe Carver via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Feb 20 12:01:30 PST 2020
zoecarver updated this revision to Diff 245708.
zoecarver added a comment.
- Add AMD cache line sizes based on @lebedev.ri's comments
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D74918/new/
https://reviews.llvm.org/D74918
Files:
clang/include/clang/Basic/TargetInfo.h
clang/lib/Basic/Targets/X86.cpp
clang/lib/Basic/Targets/X86.h
clang/lib/Sema/SemaStmt.cpp
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