[PATCH] D74337: [ARM,MVE] Add the vmovnbq,vmovntq intrinsic family.
Simon Tatham via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 17 07:56:00 PST 2020
simon_tatham marked an inline comment as done.
simon_tatham added inline comments.
================
Comment at: clang/test/CodeGen/arm-mve-intrinsics/vmovn.c:10
+// CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
+// CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i16> [[B:%.*]], <8 x i16> [[TMP1]], <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
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dmgreen wrote:
> These would be vreinterpret's in bigendian?
Yes – they're constructed by the `vreinterpret` record in the clang-side tablegen. Good point; perhaps I should expand the clang test to include a check of the BE output too.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D74337/new/
https://reviews.llvm.org/D74337
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