[PATCH] D74456: Reland "[Support] make report_fatal_error `abort` instead of `exit`"
Yuanfang Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 11 17:40:55 PST 2020
ychen created this revision.
ychen added reviewers: rnk, MaskRay, aganea, hans.
Herald added subscribers: llvm-commits, cfe-commits, kerbowa, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, dmgreen, Jim, jsji, jocewei, rupprecht, PkmX, dexonsmith, the_o, brucehoult, MartinMosbeck, rogfer01, steven_wu, atanasyan, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, fedor.sergeev, kbarton, aheejin, hiraditya, jgravelle-google, sbc100, nhaehnle, jvesely, nemanjai, sdardis, emaste, jyknight, dschuff, qcolombet, jholewinski.
Herald added a reviewer: espindola.
Herald added a reviewer: jhenderson.
Herald added projects: clang, LLVM.
Reland D67847 <https://reviews.llvm.org/D67847> after D73742 <https://reviews.llvm.org/D73742> is committed. Replace `sys::Process::Exit(1)`
with `abort` in `report_fatal_error`.
After this patch, for tools turning on `CrashRecoveryContext`,
crash handler installed by `CrashRecoveryContext` is called unless
they installed a non-returning handler using `llvm::install_fatal_error_handler`
like `cc1_main` currently does.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D74456
Files:
clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
lld/test/ELF/lto/ltopasses-custom.ll
llvm/docs/ProgrammersManual.rst
llvm/include/llvm/Support/ErrorHandling.h
llvm/lib/Support/ErrorHandling.cpp
llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
llvm/test/Assembler/getInt.ll
llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
llvm/test/Assembler/invalid-datalayout-program-addrspace.ll
llvm/test/Assembler/invalid-datalayout1.ll
llvm/test/Assembler/invalid-datalayout10.ll
llvm/test/Assembler/invalid-datalayout11.ll
llvm/test/Assembler/invalid-datalayout12.ll
llvm/test/Assembler/invalid-datalayout13.ll
llvm/test/Assembler/invalid-datalayout14.ll
llvm/test/Assembler/invalid-datalayout15.ll
llvm/test/Assembler/invalid-datalayout16.ll
llvm/test/Assembler/invalid-datalayout17.ll
llvm/test/Assembler/invalid-datalayout18.ll
llvm/test/Assembler/invalid-datalayout19.ll
llvm/test/Assembler/invalid-datalayout2.ll
llvm/test/Assembler/invalid-datalayout20.ll
llvm/test/Assembler/invalid-datalayout21.ll
llvm/test/Assembler/invalid-datalayout22.ll
llvm/test/Assembler/invalid-datalayout23.ll
llvm/test/Assembler/invalid-datalayout24.ll
llvm/test/Assembler/invalid-datalayout3.ll
llvm/test/Assembler/invalid-datalayout4.ll
llvm/test/Assembler/invalid-datalayout5.ll
llvm/test/Assembler/invalid-datalayout6.ll
llvm/test/Assembler/invalid-datalayout7.ll
llvm/test/Assembler/invalid-datalayout8.ll
llvm/test/Assembler/invalid-datalayout9.ll
llvm/test/Bitcode/function-default-address-spaces.ll
llvm/test/Bitcode/invalid-functionptr-align.ll
llvm/test/Bitcode/invalid.test
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
llvm/test/CodeGen/AArch64/tiny_supported.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
llvm/test/CodeGen/AMDGPU/div_i128.ll
llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
llvm/test/CodeGen/AMDGPU/lds-initializer.ll
llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
llvm/test/CodeGen/AMDGPU/verify-sop.mir
llvm/test/CodeGen/ARM/codemodel.ll
llvm/test/CodeGen/ARM/ldc2l.ll
llvm/test/CodeGen/ARM/machine-verifier.mir
llvm/test/CodeGen/ARM/named-reg-alloc.ll
llvm/test/CodeGen/ARM/named-reg-notareg.ll
llvm/test/CodeGen/ARM/special-reg-acore.ll
llvm/test/CodeGen/ARM/special-reg-mcore.ll
llvm/test/CodeGen/ARM/special-reg-v8m-base.ll
llvm/test/CodeGen/ARM/special-reg-v8m-main.ll
llvm/test/CodeGen/ARM/ssat-lower.ll
llvm/test/CodeGen/ARM/ssat-upper.ll
llvm/test/CodeGen/ARM/ssat-v4t.ll
llvm/test/CodeGen/ARM/stc2.ll
llvm/test/CodeGen/ARM/usat-lower.ll
llvm/test/CodeGen/ARM/usat-upper.ll
llvm/test/CodeGen/ARM/usat-v4t.ll
llvm/test/CodeGen/BPF/sdiv_error.ll
llvm/test/CodeGen/BPF/xadd.ll
llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
llvm/test/CodeGen/Generic/llc-start-stop.ll
llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
llvm/test/CodeGen/Hexagon/misaligned-const-load.ll
llvm/test/CodeGen/Hexagon/misaligned-const-store.ll
llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
llvm/test/CodeGen/Lanai/codemodel.ll
llvm/test/CodeGen/MIR/X86/machine-verifier.mir
llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
llvm/test/CodeGen/Mips/cpus-no-mips64.ll
llvm/test/CodeGen/Mips/cpus.ll
llvm/test/CodeGen/Mips/fp64a.ll
llvm/test/CodeGen/Mips/fpxx.ll
llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
llvm/test/CodeGen/Mips/instverify/dext-pos.mir
llvm/test/CodeGen/Mips/instverify/dext-size.mir
llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
llvm/test/CodeGen/Mips/instverify/dextm-size.mir
llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
llvm/test/CodeGen/Mips/instverify/dextu-size.mir
llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dins-pos.mir
llvm/test/CodeGen/Mips/instverify/dins-size.mir
llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
llvm/test/CodeGen/Mips/instverify/ext-pos.mir
llvm/test/CodeGen/Mips/instverify/ext-size.mir
llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
llvm/test/CodeGen/Mips/instverify/ins-pos.mir
llvm/test/CodeGen/Mips/instverify/ins-size.mir
llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
llvm/test/CodeGen/Mips/interrupt-attr-error.ll
llvm/test/CodeGen/Mips/micromips64-unsupported.ll
llvm/test/CodeGen/Mips/mips32r6/compatibility.ll
llvm/test/CodeGen/Mips/mips64r6/compatibility.ll
llvm/test/CodeGen/Mips/msa/3r-a.ll
llvm/test/CodeGen/Mips/msa/immediates-bad.ll
llvm/test/CodeGen/NVPTX/alias.ll
llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
llvm/test/CodeGen/NVPTX/global-ctor.ll
llvm/test/CodeGen/NVPTX/global-dtor.ll
llvm/test/CodeGen/NVPTX/libcall-instruction.ll
llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
llvm/test/CodeGen/PowerPC/aix-byval-param.ll
llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
llvm/test/CodeGen/PowerPC/aix-nest-param.ll
llvm/test/CodeGen/PowerPC/aix-trampoline.ll
llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
llvm/test/CodeGen/PowerPC/codemodel.ll
llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
llvm/test/CodeGen/RISCV/get-register-invalid.ll
llvm/test/CodeGen/RISCV/get-register-reserve.ll
llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
llvm/test/CodeGen/RISCV/module-target-abi.ll
llvm/test/CodeGen/RISCV/module-target-abi2.ll
llvm/test/CodeGen/RISCV/musttail-call.ll
llvm/test/CodeGen/RISCV/rv32e.ll
llvm/test/CodeGen/RISCV/target-abi-valid.ll
llvm/test/CodeGen/RISCV/verify-instr.mir
llvm/test/CodeGen/SPARC/codemodel.ll
llvm/test/CodeGen/SPARC/fail-alloca-align.ll
llvm/test/CodeGen/SPARC/sret-secondary.ll
llvm/test/CodeGen/SystemZ/codemodel.ll
llvm/test/CodeGen/SystemZ/ghc-cc-02.ll
llvm/test/CodeGen/SystemZ/ghc-cc-03.ll
llvm/test/CodeGen/SystemZ/ghc-cc-04.ll
llvm/test/CodeGen/SystemZ/ghc-cc-05.ll
llvm/test/CodeGen/SystemZ/ghc-cc-06.ll
llvm/test/CodeGen/SystemZ/ghc-cc-07.ll
llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
llvm/test/CodeGen/SystemZ/mverify-optypes.mir
llvm/test/CodeGen/SystemZ/vec-args-error-01.ll
llvm/test/CodeGen/SystemZ/vec-args-error-02.ll
llvm/test/CodeGen/SystemZ/vec-args-error-03.ll
llvm/test/CodeGen/SystemZ/vec-args-error-04.ll
llvm/test/CodeGen/SystemZ/vec-args-error-05.ll
llvm/test/CodeGen/SystemZ/vec-args-error-06.ll
llvm/test/CodeGen/SystemZ/vec-args-error-07.ll
llvm/test/CodeGen/SystemZ/vec-args-error-08.ll
llvm/test/CodeGen/WebAssembly/clear-cache.ll
llvm/test/CodeGen/WebAssembly/cpus.ll
llvm/test/CodeGen/WebAssembly/exception.ll
llvm/test/CodeGen/WebAssembly/offset-atomics.ll
llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
llvm/test/CodeGen/X86/AppendingLinkage.ll
llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
llvm/test/CodeGen/X86/clwb.ll
llvm/test/CodeGen/X86/codemodel.ll
llvm/test/CodeGen/X86/coff-comdat2.ll
llvm/test/CodeGen/X86/coff-comdat3.ll
llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
llvm/test/CodeGen/X86/cpus-no-x86_64.ll
llvm/test/CodeGen/X86/equiv_with_fndef.ll
llvm/test/CodeGen/X86/equiv_with_vardef.ll
llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
llvm/test/CodeGen/X86/inalloca-regparm.ll
llvm/test/CodeGen/X86/invalid-liveness.mir
llvm/test/CodeGen/X86/label-redefinition.ll
llvm/test/CodeGen/X86/llc-print-machineinstrs.mir
llvm/test/CodeGen/X86/macho-comdat.ll
llvm/test/CodeGen/X86/named-reg-alloc.ll
llvm/test/CodeGen/X86/named-reg-notareg.ll
llvm/test/CodeGen/X86/nonconst-static-ev.ll
llvm/test/CodeGen/X86/nonconst-static-iv.ll
llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
llvm/test/CodeGen/X86/segmented-stacks.ll
llvm/test/CodeGen/XCore/alignment.ll
llvm/test/CodeGen/XCore/codemodel.ll
llvm/test/CodeGen/XCore/section-name.ll
llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
llvm/test/LTO/X86/attrs.ll
llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
llvm/test/MC/ARM/Windows/invalid-relocation.s
llvm/test/MC/COFF/section-comdat-conflict.s
llvm/test/MC/COFF/section-comdat-conflict2.s
llvm/test/MC/Disassembler/AMDGPU/si-support.txt
llvm/test/MC/ELF/ARM/bss-non-zero-value.s
llvm/test/MC/ELF/common-error3.s
llvm/test/MC/ELF/section-numeric-invalid-type.s
llvm/test/MC/MachO/variable-errors.s
llvm/test/MC/Mips/micromips64-unsupported.s
llvm/test/MC/Mips/micromips64r6-unsupported.s
llvm/test/MC/Mips/nooddspreg-cmdarg.s
llvm/test/MC/PowerPC/ppc64-localentry-error1.s
llvm/test/MC/PowerPC/ppc64-localentry-error2.s
llvm/test/MC/PowerPC/pr24686.s
(76 more files...)
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D74456.244043.patch
Type: text/x-patch
Size: 207999 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20200212/975119a7/attachment-0001.bin>
More information about the cfe-commits
mailing list