[clang-tools-extra] 8cedf0e - Reland "[Support] make report_fatal_error `abort` instead of `exit`"
Yuanfang Chen via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 11 18:21:08 PST 2020
Author: Yuanfang Chen
Date: 2020-02-11T18:20:40-08:00
New Revision: 8cedf0e2994c1a258902ed931abdec5f94725a55
URL: https://github.com/llvm/llvm-project/commit/8cedf0e2994c1a258902ed931abdec5f94725a55
DIFF: https://github.com/llvm/llvm-project/commit/8cedf0e2994c1a258902ed931abdec5f94725a55.diff
LOG: Reland "[Support] make report_fatal_error `abort` instead of `exit`"
Summary:
Reland D67847 after D73742 is committed. Replace `sys::Process::Exit(1)`
with `abort` in `report_fatal_error`.
After this patch, for tools turning on `CrashRecoveryContext`,
crash handler installed by `CrashRecoveryContext` is called unless
they installed a non-returning handler using `llvm::install_fatal_error_handler`
like `cc1_main` currently does.
Reviewers: rnk, MaskRay, aganea, hans, espindola, jhenderson
Subscribers: jholewinski, qcolombet, dschuff, jyknight, emaste, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, steven_wu, rogfer01, MartinMosbeck, brucehoult, the_o, dexonsmith, PkmX, rupprecht, jocewei, jsji, Jim, dmgreen, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, kerbowa, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74456
Added:
Modified:
clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
lld/test/ELF/lto/ltopasses-custom.ll
llvm/docs/ProgrammersManual.rst
llvm/include/llvm/Support/ErrorHandling.h
llvm/lib/Support/ErrorHandling.cpp
llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
llvm/test/Assembler/getInt.ll
llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
llvm/test/Assembler/invalid-datalayout-program-addrspace.ll
llvm/test/Assembler/invalid-datalayout1.ll
llvm/test/Assembler/invalid-datalayout10.ll
llvm/test/Assembler/invalid-datalayout11.ll
llvm/test/Assembler/invalid-datalayout12.ll
llvm/test/Assembler/invalid-datalayout13.ll
llvm/test/Assembler/invalid-datalayout14.ll
llvm/test/Assembler/invalid-datalayout15.ll
llvm/test/Assembler/invalid-datalayout16.ll
llvm/test/Assembler/invalid-datalayout17.ll
llvm/test/Assembler/invalid-datalayout18.ll
llvm/test/Assembler/invalid-datalayout19.ll
llvm/test/Assembler/invalid-datalayout2.ll
llvm/test/Assembler/invalid-datalayout20.ll
llvm/test/Assembler/invalid-datalayout21.ll
llvm/test/Assembler/invalid-datalayout22.ll
llvm/test/Assembler/invalid-datalayout23.ll
llvm/test/Assembler/invalid-datalayout24.ll
llvm/test/Assembler/invalid-datalayout3.ll
llvm/test/Assembler/invalid-datalayout4.ll
llvm/test/Assembler/invalid-datalayout5.ll
llvm/test/Assembler/invalid-datalayout6.ll
llvm/test/Assembler/invalid-datalayout7.ll
llvm/test/Assembler/invalid-datalayout8.ll
llvm/test/Assembler/invalid-datalayout9.ll
llvm/test/Bitcode/function-default-address-spaces.ll
llvm/test/Bitcode/invalid-functionptr-align.ll
llvm/test/Bitcode/invalid.test
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
llvm/test/CodeGen/AArch64/tiny_supported.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
llvm/test/CodeGen/AMDGPU/div_i128.ll
llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
llvm/test/CodeGen/AMDGPU/lds-initializer.ll
llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
llvm/test/CodeGen/AMDGPU/verify-sop.mir
llvm/test/CodeGen/ARM/codemodel.ll
llvm/test/CodeGen/ARM/ldc2l.ll
llvm/test/CodeGen/ARM/machine-verifier.mir
llvm/test/CodeGen/ARM/named-reg-alloc.ll
llvm/test/CodeGen/ARM/named-reg-notareg.ll
llvm/test/CodeGen/ARM/special-reg-acore.ll
llvm/test/CodeGen/ARM/special-reg-mcore.ll
llvm/test/CodeGen/ARM/special-reg-v8m-base.ll
llvm/test/CodeGen/ARM/special-reg-v8m-main.ll
llvm/test/CodeGen/ARM/ssat-lower.ll
llvm/test/CodeGen/ARM/ssat-upper.ll
llvm/test/CodeGen/ARM/ssat-v4t.ll
llvm/test/CodeGen/ARM/stc2.ll
llvm/test/CodeGen/ARM/usat-lower.ll
llvm/test/CodeGen/ARM/usat-upper.ll
llvm/test/CodeGen/ARM/usat-v4t.ll
llvm/test/CodeGen/BPF/sdiv_error.ll
llvm/test/CodeGen/BPF/xadd.ll
llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
llvm/test/CodeGen/Generic/llc-start-stop.ll
llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
llvm/test/CodeGen/Hexagon/misaligned-const-load.ll
llvm/test/CodeGen/Hexagon/misaligned-const-store.ll
llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
llvm/test/CodeGen/Lanai/codemodel.ll
llvm/test/CodeGen/MIR/X86/machine-verifier.mir
llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
llvm/test/CodeGen/Mips/cpus-no-mips64.ll
llvm/test/CodeGen/Mips/cpus.ll
llvm/test/CodeGen/Mips/fp64a.ll
llvm/test/CodeGen/Mips/fpxx.ll
llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
llvm/test/CodeGen/Mips/instverify/dext-pos.mir
llvm/test/CodeGen/Mips/instverify/dext-size.mir
llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
llvm/test/CodeGen/Mips/instverify/dextm-size.mir
llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
llvm/test/CodeGen/Mips/instverify/dextu-size.mir
llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dins-pos.mir
llvm/test/CodeGen/Mips/instverify/dins-size.mir
llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
llvm/test/CodeGen/Mips/instverify/ext-pos.mir
llvm/test/CodeGen/Mips/instverify/ext-size.mir
llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
llvm/test/CodeGen/Mips/instverify/ins-pos.mir
llvm/test/CodeGen/Mips/instverify/ins-size.mir
llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
llvm/test/CodeGen/Mips/interrupt-attr-error.ll
llvm/test/CodeGen/Mips/micromips64-unsupported.ll
llvm/test/CodeGen/Mips/mips32r6/compatibility.ll
llvm/test/CodeGen/Mips/mips64r6/compatibility.ll
llvm/test/CodeGen/Mips/msa/3r-a.ll
llvm/test/CodeGen/Mips/msa/immediates-bad.ll
llvm/test/CodeGen/NVPTX/alias.ll
llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
llvm/test/CodeGen/NVPTX/global-ctor.ll
llvm/test/CodeGen/NVPTX/global-dtor.ll
llvm/test/CodeGen/NVPTX/libcall-instruction.ll
llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
llvm/test/CodeGen/PowerPC/aix-byval-param.ll
llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
llvm/test/CodeGen/PowerPC/aix-nest-param.ll
llvm/test/CodeGen/PowerPC/aix-trampoline.ll
llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
llvm/test/CodeGen/PowerPC/codemodel.ll
llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
llvm/test/CodeGen/RISCV/get-register-invalid.ll
llvm/test/CodeGen/RISCV/get-register-reserve.ll
llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
llvm/test/CodeGen/RISCV/module-target-abi.ll
llvm/test/CodeGen/RISCV/module-target-abi2.ll
llvm/test/CodeGen/RISCV/musttail-call.ll
llvm/test/CodeGen/RISCV/rv32e.ll
llvm/test/CodeGen/RISCV/target-abi-valid.ll
llvm/test/CodeGen/RISCV/verify-instr.mir
llvm/test/CodeGen/SPARC/codemodel.ll
llvm/test/CodeGen/SPARC/fail-alloca-align.ll
llvm/test/CodeGen/SPARC/sret-secondary.ll
llvm/test/CodeGen/SystemZ/codemodel.ll
llvm/test/CodeGen/SystemZ/ghc-cc-02.ll
llvm/test/CodeGen/SystemZ/ghc-cc-03.ll
llvm/test/CodeGen/SystemZ/ghc-cc-04.ll
llvm/test/CodeGen/SystemZ/ghc-cc-05.ll
llvm/test/CodeGen/SystemZ/ghc-cc-06.ll
llvm/test/CodeGen/SystemZ/ghc-cc-07.ll
llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
llvm/test/CodeGen/SystemZ/mverify-optypes.mir
llvm/test/CodeGen/SystemZ/vec-args-error-01.ll
llvm/test/CodeGen/SystemZ/vec-args-error-02.ll
llvm/test/CodeGen/SystemZ/vec-args-error-03.ll
llvm/test/CodeGen/SystemZ/vec-args-error-04.ll
llvm/test/CodeGen/SystemZ/vec-args-error-05.ll
llvm/test/CodeGen/SystemZ/vec-args-error-06.ll
llvm/test/CodeGen/SystemZ/vec-args-error-07.ll
llvm/test/CodeGen/SystemZ/vec-args-error-08.ll
llvm/test/CodeGen/WebAssembly/clear-cache.ll
llvm/test/CodeGen/WebAssembly/cpus.ll
llvm/test/CodeGen/WebAssembly/exception.ll
llvm/test/CodeGen/WebAssembly/offset-atomics.ll
llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
llvm/test/CodeGen/X86/AppendingLinkage.ll
llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
llvm/test/CodeGen/X86/clwb.ll
llvm/test/CodeGen/X86/codemodel.ll
llvm/test/CodeGen/X86/coff-comdat2.ll
llvm/test/CodeGen/X86/coff-comdat3.ll
llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
llvm/test/CodeGen/X86/cpus-no-x86_64.ll
llvm/test/CodeGen/X86/equiv_with_fndef.ll
llvm/test/CodeGen/X86/equiv_with_vardef.ll
llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
llvm/test/CodeGen/X86/inalloca-regparm.ll
llvm/test/CodeGen/X86/invalid-liveness.mir
llvm/test/CodeGen/X86/label-redefinition.ll
llvm/test/CodeGen/X86/llc-print-machineinstrs.mir
llvm/test/CodeGen/X86/macho-comdat.ll
llvm/test/CodeGen/X86/named-reg-alloc.ll
llvm/test/CodeGen/X86/named-reg-notareg.ll
llvm/test/CodeGen/X86/nonconst-static-ev.ll
llvm/test/CodeGen/X86/nonconst-static-iv.ll
llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
llvm/test/CodeGen/X86/segmented-stacks.ll
llvm/test/CodeGen/XCore/alignment.ll
llvm/test/CodeGen/XCore/codemodel.ll
llvm/test/CodeGen/XCore/section-name.ll
llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
llvm/test/LTO/X86/attrs.ll
llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
llvm/test/MC/ARM/Windows/invalid-relocation.s
llvm/test/MC/COFF/section-comdat-conflict.s
llvm/test/MC/COFF/section-comdat-conflict2.s
llvm/test/MC/Disassembler/AMDGPU/si-support.txt
llvm/test/MC/ELF/ARM/bss-non-zero-value.s
llvm/test/MC/ELF/common-error3.s
llvm/test/MC/ELF/section-numeric-invalid-type.s
llvm/test/MC/MachO/variable-errors.s
llvm/test/MC/Mips/micromips64-unsupported.s
llvm/test/MC/Mips/micromips64r6-unsupported.s
llvm/test/MC/Mips/nooddspreg-cmdarg.s
llvm/test/MC/PowerPC/ppc64-localentry-error1.s
llvm/test/MC/PowerPC/ppc64-localentry-error2.s
llvm/test/MC/PowerPC/pr24686.s
llvm/test/MC/RISCV/mattr-invalid-combination.s
llvm/test/MC/WebAssembly/blockaddress.ll
llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
llvm/test/MC/X86/check-end-of-data-region.s
llvm/test/MC/X86/encoder-fail.s
llvm/test/MC/X86/invalid-sleb.s
llvm/test/MC/X86/reloc-bss.s
llvm/test/MachineVerifier/live-ins-01.mir
llvm/test/MachineVerifier/live-ins-02.mir
llvm/test/MachineVerifier/live-ins-03.mir
llvm/test/MachineVerifier/test_copy.mir
llvm/test/MachineVerifier/test_copy_mismatch_types.mir
llvm/test/MachineVerifier/test_g_add.mir
llvm/test/MachineVerifier/test_g_addrspacecast.mir
llvm/test/MachineVerifier/test_g_bitcast.mir
llvm/test/MachineVerifier/test_g_brjt.mir
llvm/test/MachineVerifier/test_g_build_vector.mir
llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
llvm/test/MachineVerifier/test_g_concat_vectors.mir
llvm/test/MachineVerifier/test_g_constant.mir
llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
llvm/test/MachineVerifier/test_g_extract.mir
llvm/test/MachineVerifier/test_g_fcmp.mir
llvm/test/MachineVerifier/test_g_fconstant.mir
llvm/test/MachineVerifier/test_g_icmp.mir
llvm/test/MachineVerifier/test_g_insert.mir
llvm/test/MachineVerifier/test_g_intrinsic.mir
llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
llvm/test/MachineVerifier/test_g_inttoptr.mir
llvm/test/MachineVerifier/test_g_jump_table.mir
llvm/test/MachineVerifier/test_g_load.mir
llvm/test/MachineVerifier/test_g_merge_values.mir
llvm/test/MachineVerifier/test_g_phi.mir
llvm/test/MachineVerifier/test_g_ptr_add.mir
llvm/test/MachineVerifier/test_g_ptrtoint.mir
llvm/test/MachineVerifier/test_g_select.mir
llvm/test/MachineVerifier/test_g_sext_inreg.mir
llvm/test/MachineVerifier/test_g_sextload.mir
llvm/test/MachineVerifier/test_g_shuffle_vector.mir
llvm/test/MachineVerifier/test_g_store.mir
llvm/test/MachineVerifier/test_g_trunc.mir
llvm/test/MachineVerifier/test_g_zextload.mir
llvm/test/MachineVerifier/test_memccpy_intrinsics.mir
llvm/test/MachineVerifier/test_phis_precede_nonphis.mir
llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
llvm/test/MachineVerifier/verifier-generic-types-1.mir
llvm/test/MachineVerifier/verifier-generic-types-2.mir
llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
llvm/test/MachineVerifier/verifier-phi-fail0.mir
llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
llvm/test/MachineVerifier/verify-regbankselected.mir
llvm/test/MachineVerifier/verify-regops.mir
llvm/test/MachineVerifier/verify-selected.mir
llvm/test/Object/coff-invalid.test
llvm/test/Object/elf-invalid-phdr.test
llvm/test/Object/invalid.test
llvm/test/Object/wasm-invalid-file.yaml
llvm/test/Object/wasm-string-outside-section.test
llvm/test/Other/optimization-remarks-inline.ll
llvm/test/TableGen/HwModeSelect.td
llvm/test/Transforms/BlockExtractor/invalid-block.ll
llvm/test/Transforms/BlockExtractor/invalid-function.ll
llvm/test/Transforms/BlockExtractor/invalid-line.ll
llvm/test/Transforms/FunctionImport/not-prevailing.ll
llvm/test/Transforms/GCOVProfiling/version.ll
llvm/test/Transforms/InstCombine/limit-max-iterations.ll
llvm/test/tools/llvm-lto2/X86/pipeline.ll
llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
Removed:
llvm/test/Other/close-stderr.ll
################################################################################
diff --git a/clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp b/clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
index b8707d6caaec..54fe8910a9a9 100644
--- a/clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
+++ b/clang-tools-extra/test/clang-tidy/infrastructure/empty-database.cpp
@@ -1,5 +1,5 @@
// UNSUPPORTED: system-windows
-// RUN: not clang-tidy -p %S/Inputs/empty-database %s 2>&1 | FileCheck %s
+// RUN: not --crash clang-tidy -p %S/Inputs/empty-database %s 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Cannot chdir into ""!
diff --git a/clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp b/clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
index 3ccdb16cce4e..26c63cfbd427 100644
--- a/clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
+++ b/clang/unittests/libclang/CrashTests/LibclangCrashTest.cpp
@@ -31,7 +31,7 @@ TEST_F(LibclangParseTest, UninstallAbortingLLVMFatalErrorHandler) {
std::string Main = "main.h";
WriteFile(Main, "#pragma clang __debug llvm_fatal_error");
- EXPECT_EXIT(clang_parseTranslationUnit(
- Index, Main.c_str(), nullptr, 0, nullptr, 0, TUFlags),
- ::testing::ExitedWithCode(1), "ERROR");
+ EXPECT_DEATH(clang_parseTranslationUnit(Index, Main.c_str(), nullptr, 0,
+ nullptr, 0, TUFlags),
+ "ERROR");
}
diff --git a/lld/test/ELF/lto/ltopasses-custom.ll b/lld/test/ELF/lto/ltopasses-custom.ll
index f0322f8e4175..fd73f14d6571 100644
--- a/lld/test/ELF/lto/ltopasses-custom.ll
+++ b/lld/test/ELF/lto/ltopasses-custom.ll
@@ -24,13 +24,13 @@ define void @barrier() {
; ATOMIC-NEXT: ret void
; Check that invalid passes are rejected gracefully.
-; RUN: not ld.lld -m elf_x86_64 %t.o -o %t2.so \
+; RUN: not --crash ld.lld -m elf_x86_64 %t.o -o %t2.so \
; RUN: --lto-newpm-passes=iamnotapass -shared 2>&1 | \
; RUN: FileCheck %s --check-prefix=INVALID
; INVALID: unable to parse pass pipeline description 'iamnotapass': unknown pass name 'iamnotapass'
; Check that invalid AA pipelines are rejected gracefully.
-; RUN: not ld.lld -m elf_x86_64 %t.o -o %t2.so \
+; RUN: not --crash ld.lld -m elf_x86_64 %t.o -o %t2.so \
; RUN: --lto-newpm-passes=globaldce --lto-aa-pipeline=patatino \
; RUN: -shared 2>&1 | \
; RUN: FileCheck %s --check-prefix=INVALIDAA
diff --git a/llvm/docs/ProgrammersManual.rst b/llvm/docs/ProgrammersManual.rst
index 98002f687a57..8f8fec611c48 100644
--- a/llvm/docs/ProgrammersManual.rst
+++ b/llvm/docs/ProgrammersManual.rst
@@ -453,8 +453,8 @@ recovery.
LLVM, there are places where this hasn't been practical to apply. In
situations where you absolutely must emit a non-programmatic error and
the ``Error`` model isn't workable you can call ``report_fatal_error``,
- which will call installed error handlers, print a message, and exit the
- program.
+ which will call installed error handlers, print a message, and abort the
+ program. The use of `report_fatal_error` in this case is discouraged.
Recoverable errors are modeled using LLVM's ``Error`` scheme. This scheme
represents errors using function return values, similar to classic C integer
diff --git a/llvm/include/llvm/Support/ErrorHandling.h b/llvm/include/llvm/Support/ErrorHandling.h
index f75c2984a9ff..7678d8d6ba91 100644
--- a/llvm/include/llvm/Support/ErrorHandling.h
+++ b/llvm/include/llvm/Support/ErrorHandling.h
@@ -66,7 +66,7 @@ class StringRef;
///
/// If no error handler is installed the default is to print the message to
/// standard error, followed by a newline.
-/// After the error handler is called this function will call exit(1), it
+/// After the error handler is called this function will call abort(), it
/// does not return.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason,
bool gen_crash_diag = true);
diff --git a/llvm/lib/Support/ErrorHandling.cpp b/llvm/lib/Support/ErrorHandling.cpp
index a9463024c420..f70a6921a41a 100644
--- a/llvm/lib/Support/ErrorHandling.cpp
+++ b/llvm/lib/Support/ErrorHandling.cpp
@@ -123,7 +123,7 @@ void llvm::report_fatal_error(const Twine &Reason, bool GenCrashDiag) {
// files registered with RemoveFileOnSignal.
sys::RunInterruptHandlers();
- sys::Process::Exit(1);
+ abort();
}
void llvm::install_bad_alloc_error_handler(fatal_error_handler_t handler,
diff --git a/llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll b/llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
index 21cd6a6dc782..4203c5546c20 100644
--- a/llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
+++ b/llvm/test/Assembler/datalayout-invalid-function-ptr-alignment.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2
diff --git a/llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll b/llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
index c8d7ba62ab80..8fc18d86b1fa 100644
--- a/llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
+++ b/llvm/test/Assembler/datalayout-invalid-stack-natural-alignment.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2
diff --git a/llvm/test/Assembler/getInt.ll b/llvm/test/Assembler/getInt.ll
index 8e2537ae6cf1..02f312b1bc6c 100644
--- a/llvm/test/Assembler/getInt.ll
+++ b/llvm/test/Assembler/getInt.ll
@@ -1,3 +1,3 @@
-; RUN: not opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int'
+; RUN: not --crash opt < %s 2>&1 | grep 'not a number, or does not fit in an unsigned int'
target datalayout = "p:4294967296:64:64"
diff --git a/llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll b/llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
index f0407da73e4f..16670259ccf4 100644
--- a/llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
+++ b/llvm/test/Assembler/invalid-datalayout-alloca-addrspace.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "A16777216"
; CHECK: Invalid address space, must be a 24-bit integer
diff --git a/llvm/test/Assembler/invalid-datalayout-program-addrspace.ll b/llvm/test/Assembler/invalid-datalayout-program-addrspace.ll
index e636b75dee4d..fe0ab5c6087b 100644
--- a/llvm/test/Assembler/invalid-datalayout-program-addrspace.ll
+++ b/llvm/test/Assembler/invalid-datalayout-program-addrspace.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
; CHECK: Invalid address space, must be a 24-bit integer
target datalayout = "P16777216"
diff --git a/llvm/test/Assembler/invalid-datalayout1.ll b/llvm/test/Assembler/invalid-datalayout1.ll
index d1befdcdf294..5cf088b785b5 100644
--- a/llvm/test/Assembler/invalid-datalayout1.ll
+++ b/llvm/test/Assembler/invalid-datalayout1.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "^"
; CHECK: Unknown specifier in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout10.ll b/llvm/test/Assembler/invalid-datalayout10.ll
index 9f19688f852b..80e5d4026d9b 100644
--- a/llvm/test/Assembler/invalid-datalayout10.ll
+++ b/llvm/test/Assembler/invalid-datalayout10.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m"
; CHECK: Expected mangling specifier in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout11.ll b/llvm/test/Assembler/invalid-datalayout11.ll
index f8fed8ff9ff3..0fa99c5f7c29 100644
--- a/llvm/test/Assembler/invalid-datalayout11.ll
+++ b/llvm/test/Assembler/invalid-datalayout11.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m."
; CHECK: Unexpected trailing characters after mangling specifier in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout12.ll b/llvm/test/Assembler/invalid-datalayout12.ll
index d79c196baab1..9a7535f7b6ca 100644
--- a/llvm/test/Assembler/invalid-datalayout12.ll
+++ b/llvm/test/Assembler/invalid-datalayout12.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "f"
; CHECK: Missing alignment specification in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout13.ll b/llvm/test/Assembler/invalid-datalayout13.ll
index 5ac719dbb7a9..26dbf44f1928 100644
--- a/llvm/test/Assembler/invalid-datalayout13.ll
+++ b/llvm/test/Assembler/invalid-datalayout13.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = ":32"
; CHECK: Expected token before separator in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout14.ll b/llvm/test/Assembler/invalid-datalayout14.ll
index 84634b52a146..3ca2da41743d 100644
--- a/llvm/test/Assembler/invalid-datalayout14.ll
+++ b/llvm/test/Assembler/invalid-datalayout14.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:64:16"
; CHECK: Preferred alignment cannot be less than the ABI alignment
diff --git a/llvm/test/Assembler/invalid-datalayout15.ll b/llvm/test/Assembler/invalid-datalayout15.ll
index ea240b73fd25..8fdfcbf1ee83 100644
--- a/llvm/test/Assembler/invalid-datalayout15.ll
+++ b/llvm/test/Assembler/invalid-datalayout15.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:16:16777216"
; CHECK: Invalid preferred alignment, must be a 16bit integer
diff --git a/llvm/test/Assembler/invalid-datalayout16.ll b/llvm/test/Assembler/invalid-datalayout16.ll
index 0dd1abb629b6..23f3e17e6d15 100644
--- a/llvm/test/Assembler/invalid-datalayout16.ll
+++ b/llvm/test/Assembler/invalid-datalayout16.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i64:16777216:16777216"
; CHECK: Invalid ABI alignment, must be a 16bit integer
diff --git a/llvm/test/Assembler/invalid-datalayout17.ll b/llvm/test/Assembler/invalid-datalayout17.ll
index 519f5c10ab3c..75c9b005c30d 100644
--- a/llvm/test/Assembler/invalid-datalayout17.ll
+++ b/llvm/test/Assembler/invalid-datalayout17.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i16777216:16:16"
; CHECK: Invalid bit width, must be a 24bit integer
diff --git a/llvm/test/Assembler/invalid-datalayout18.ll b/llvm/test/Assembler/invalid-datalayout18.ll
index b9956f98c9c6..dc6e722445f4 100644
--- a/llvm/test/Assembler/invalid-datalayout18.ll
+++ b/llvm/test/Assembler/invalid-datalayout18.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:32:32:16"
; CHECK: Preferred alignment cannot be less than the ABI alignment
diff --git a/llvm/test/Assembler/invalid-datalayout19.ll b/llvm/test/Assembler/invalid-datalayout19.ll
index fc0fc4685209..dc3fa2bde1b0 100644
--- a/llvm/test/Assembler/invalid-datalayout19.ll
+++ b/llvm/test/Assembler/invalid-datalayout19.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:0:32:32"
diff --git a/llvm/test/Assembler/invalid-datalayout2.ll b/llvm/test/Assembler/invalid-datalayout2.ll
index a435612bf854..1f7db4e605af 100644
--- a/llvm/test/Assembler/invalid-datalayout2.ll
+++ b/llvm/test/Assembler/invalid-datalayout2.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "m:v"
; CHECK: Unknown mangling in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout20.ll b/llvm/test/Assembler/invalid-datalayout20.ll
index a9ac1d7fe098..811488e945c8 100644
--- a/llvm/test/Assembler/invalid-datalayout20.ll
+++ b/llvm/test/Assembler/invalid-datalayout20.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:64:24:64"
diff --git a/llvm/test/Assembler/invalid-datalayout21.ll b/llvm/test/Assembler/invalid-datalayout21.ll
index a39d1d7a14a8..0db99d254b13 100644
--- a/llvm/test/Assembler/invalid-datalayout21.ll
+++ b/llvm/test/Assembler/invalid-datalayout21.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:64:64:24"
diff --git a/llvm/test/Assembler/invalid-datalayout22.ll b/llvm/test/Assembler/invalid-datalayout22.ll
index 14e4c2822ce4..3db71d7d1b2d 100644
--- a/llvm/test/Assembler/invalid-datalayout22.ll
+++ b/llvm/test/Assembler/invalid-datalayout22.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "v128:0:128"
diff --git a/llvm/test/Assembler/invalid-datalayout23.ll b/llvm/test/Assembler/invalid-datalayout23.ll
index 430326327bc1..308b0140cd98 100644
--- a/llvm/test/Assembler/invalid-datalayout23.ll
+++ b/llvm/test/Assembler/invalid-datalayout23.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i32:24:32"
diff --git a/llvm/test/Assembler/invalid-datalayout24.ll b/llvm/test/Assembler/invalid-datalayout24.ll
index 616ec64518a5..0c38103c9057 100644
--- a/llvm/test/Assembler/invalid-datalayout24.ll
+++ b/llvm/test/Assembler/invalid-datalayout24.ll
@@ -1,4 +1,4 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "i32:32:24"
diff --git a/llvm/test/Assembler/invalid-datalayout3.ll b/llvm/test/Assembler/invalid-datalayout3.ll
index 44535fd055b5..613d619c5a05 100644
--- a/llvm/test/Assembler/invalid-datalayout3.ll
+++ b/llvm/test/Assembler/invalid-datalayout3.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "n0"
; CHECK: Zero width native integer type in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout4.ll b/llvm/test/Assembler/invalid-datalayout4.ll
index 2d946d32609d..5b174ff06184 100644
--- a/llvm/test/Assembler/invalid-datalayout4.ll
+++ b/llvm/test/Assembler/invalid-datalayout4.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p16777216:64:64:64"
; CHECK: Invalid address space, must be a 24bit integer
diff --git a/llvm/test/Assembler/invalid-datalayout5.ll b/llvm/test/Assembler/invalid-datalayout5.ll
index 3ce8791c0870..6ca188a4fd57 100644
--- a/llvm/test/Assembler/invalid-datalayout5.ll
+++ b/llvm/test/Assembler/invalid-datalayout5.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "a1:64"
; CHECK: Sized aggregate specification in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout6.ll b/llvm/test/Assembler/invalid-datalayout6.ll
index 425099f7cad8..f8ea6392a359 100644
--- a/llvm/test/Assembler/invalid-datalayout6.ll
+++ b/llvm/test/Assembler/invalid-datalayout6.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "a:"
; CHECK: Trailing separator in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout7.ll b/llvm/test/Assembler/invalid-datalayout7.ll
index 097227ae6ae8..66eb7643d114 100644
--- a/llvm/test/Assembler/invalid-datalayout7.ll
+++ b/llvm/test/Assembler/invalid-datalayout7.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "p:52"
; CHECK: number of bits must be a byte width multiple
diff --git a/llvm/test/Assembler/invalid-datalayout8.ll b/llvm/test/Assembler/invalid-datalayout8.ll
index 28832ffb17dd..2f7f18c7af5b 100644
--- a/llvm/test/Assembler/invalid-datalayout8.ll
+++ b/llvm/test/Assembler/invalid-datalayout8.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "e-p"
; CHECK: Missing size specification for pointer in datalayout string
diff --git a/llvm/test/Assembler/invalid-datalayout9.ll b/llvm/test/Assembler/invalid-datalayout9.ll
index dfeac65cf604..74b9dbacbf06 100644
--- a/llvm/test/Assembler/invalid-datalayout9.ll
+++ b/llvm/test/Assembler/invalid-datalayout9.ll
@@ -1,3 +1,3 @@
-; RUN: not llvm-as < %s 2>&1 | FileCheck %s
+; RUN: not --crash llvm-as < %s 2>&1 | FileCheck %s
target datalayout = "e-p:64"
; CHECK: Missing alignment specification for pointer in datalayout string
diff --git a/llvm/test/Bitcode/function-default-address-spaces.ll b/llvm/test/Bitcode/function-default-address-spaces.ll
index e008f43501a0..72b727924b42 100644
--- a/llvm/test/Bitcode/function-default-address-spaces.ll
+++ b/llvm/test/Bitcode/function-default-address-spaces.ll
@@ -1,6 +1,6 @@
; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s -check-prefixes CHECK,PROG-AS0
; RUN: llvm-as -data-layout "P200" %s -o - | llvm-dis | FileCheck %s -check-prefixes CHECK,PROG-AS200
-; RUN: not llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT
+; RUN: not --crash llvm-as -data-layout "P123456789" %s -o /dev/null 2>&1 | FileCheck %s -check-prefix BAD-DATALAYOUT
; BAD-DATALAYOUT: LLVM ERROR: Invalid address space, must be a 24-bit integer
; PROG-AS0-NOT: target datalayout
diff --git a/llvm/test/Bitcode/invalid-functionptr-align.ll b/llvm/test/Bitcode/invalid-functionptr-align.ll
index 4ff797a4b014..be7ce49e4d53 100644
--- a/llvm/test/Bitcode/invalid-functionptr-align.ll
+++ b/llvm/test/Bitcode/invalid-functionptr-align.ll
@@ -1,5 +1,5 @@
; Bitcode with invalid function pointer alignment.
-; RUN: not llvm-dis %s.bc -o - 2>&1 | FileCheck %s
+; RUN: not --crash llvm-dis %s.bc -o - 2>&1 | FileCheck %s
CHECK: LLVM ERROR: Alignment is neither 0 nor a power of 2
diff --git a/llvm/test/Bitcode/invalid.test b/llvm/test/Bitcode/invalid.test
index 8260ac862576..90303586ec3b 100644
--- a/llvm/test/Bitcode/invalid.test
+++ b/llvm/test/Bitcode/invalid.test
@@ -1,6 +1,6 @@
RUN: not llvm-dis -disable-output %p/Inputs/invalid-empty.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-EMPTY %s
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \
RUN: FileCheck --check-prefix=INVALID-ENCODING %s
RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev.bc 2>&1 | \
RUN: FileCheck --check-prefix=BAD-ABBREV %s
@@ -71,14 +71,14 @@ RUN: FileCheck --check-prefix=FP-SHIFT %s
FP-SHIFT: Invalid record
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-vbr-size-too-big.bc 2>&1 | \
RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-fixed-size-too-big.bc 2>&1 | \
RUN: FileCheck --check-prefix=HUGE-ABBREV-OP %s
HUGE-ABBREV-OP: Fixed or VBR abbrev record with size > MaxChunkData
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-type.bc 2>&1 | \
RUN: FileCheck --check-prefix=ARRAY-TYPE %s
ARRAY-TYPE: Array element type can't be an Array or a Blob
@@ -116,7 +116,7 @@ RUN: FileCheck --check-prefix=INVALID-CAST %s
INVALID-CAST: Invalid cast
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-array-op-not-2nd-to-last.bc 2>&1 | \
RUN: FileCheck --check-prefix=ARRAY-NOT-2LAST %s
ARRAY-NOT-2LAST: Array op not second to last
@@ -176,7 +176,7 @@ RUN: FileCheck --check-prefix=INVALID-GVCOMDAT-ID %s
INVALID-GVCOMDAT-ID: Invalid global variable comdat ID
-RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \
+RUN: not --crash llvm-dis -disable-output %p/Inputs/invalid-abbrev-no-operands.bc 2>&1 | \
RUN: FileCheck --check-prefix=ABBREV-NO-OPS %s
ABBREV-NO-OPS: Abbrev record with no operands
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
index bbe8ea0da25b..661bd0d121e0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -1,9 +1,9 @@
-; RUN: not llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: not --crash llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK
; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err
-; RUN: not llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN
+; RUN: not --crash llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN
; This file checks that the fallback path to selection dag works.
; The test is fragile in the sense that it must be updated to expose
; something that fails with global-isel.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
index 72af098a8946..0894fbeb34a9 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-musttail.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc %s -mtriple aarch64-apple-darwin -debug-only=aarch64-call-lowering -global-isel -global-isel-abort=2 -o - 2>&1 | FileCheck %s
; REQUIRES: asserts
; Verify that we fall back to SelectionDAG, and error out when we can't tail call musttail functions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
index 7661626f6c1c..9c318b7574b8 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-1.mir
@@ -1,5 +1,4 @@
-# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
-# REQUIRES: asserts
+# RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
# This is to demonstrate what kind of bugs we're missing w/o some kind
# of validation for LegalizerInfo: G_INTTOPTR could only be legal /
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
index 0b5b7b440f29..bbdc54a51219 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-inttoptr-xfail-2.mir
@@ -1,5 +1,4 @@
-# RUN: not llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
-# REQUIRES: asserts
+# RUN: not --crash llc -mtriple=aarch64-- -run-pass=legalizer %s -o - 2>&1 | FileCheck %s
# This is to demonstrate what kind of bugs we're missing w/o some kind
# of validation for LegalizerInfo: G_INTTOPTR could only be legal /
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll b/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
index f2e6fbce0d7a..6408f2e0b0d5 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/no-neon-no-fp.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-unknown"
diff --git a/llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll b/llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
index 5d48c17e1286..bd14ec61b55c 100644
--- a/llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll b/llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
index 8a5fd6f1ac8b..fe5f000a393e 100644
--- a/llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-named-reg-notareg.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll b/llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
index 7ef51d7d4c01..9a24d6acfa11 100644
--- a/llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
@@ -9,7 +9,7 @@
; FIXME: We currently produce "small" code for the tiny model
; RUN: llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=tiny -verify-machineinstrs < %s | FileCheck %s
; FIXME: We currently error for the large code model
-; RUN: not llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
+; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -relocation-model=pic -aarch64-elf-ldtls-generation=1 -code-model=large -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
; CHECK-LARGE: ELF TLS only supported in small memory model
diff --git a/llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll b/llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
index 4f169678974f..d6df1a3907bc 100644
--- a/llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-tls-initial-exec.ll
@@ -3,7 +3,7 @@
; RUN: llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=tiny < %s | FileCheck %s --check-prefix=CHECK-TINY
; RUN: llc -mtriple=arm64-none-linux-gnu -filetype=obj < %s -code-model=tiny | llvm-objdump -r - | FileCheck --check-prefix=CHECK-TINY-RELOC %s
; FIXME: We currently error for the large code model
-; RUN: not llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
+; RUN: not --crash llc -mtriple=arm64-none-linux-gnu -verify-machineinstrs -show-mc-encoding -code-model=large < %s 2>&1 | FileCheck %s --check-prefix=CHECK-LARGE
; CHECK-LARGE: ELF TLS only supported in small memory model
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll b/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
index 62815daa6c51..8d62fb355666 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-sp-adjust.ll
@@ -1,5 +1,5 @@
; RUN: llc -O0 -fast-isel -mtriple=aarch64-apple-ios -o - %s | FileCheck %s
-; RUN: not llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t
+; RUN: not --crash llc -O0 -mtriple=aarch64-apple-ios -o /dev/null -fast-isel -fast-isel-abort=3 %s 2> %t
; RUN: FileCheck %s --check-prefix=CHECK-ERRORS < %t
; The issue here is that FastISel cannot emit an ADDrr where one of the inputs
diff --git a/llvm/test/CodeGen/AArch64/tiny_supported.ll b/llvm/test/CodeGen/AArch64/tiny_supported.ll
index 50f4a9c344a7..400fde0aa0a9 100644
--- a/llvm/test/CodeGen/AArch64/tiny_supported.ll
+++ b/llvm/test/CodeGen/AArch64/tiny_supported.ll
@@ -1,8 +1,8 @@
; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s
; RUN: llc -verify-machineinstrs -o - -mtriple=aarch64-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s
-; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-darwin -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm64-apple-ios -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=aarch64-unknown-windows-msvc -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=NOTINY
; CHECK-NOT: tiny code model is only supported on ELF
; CHECK-LABEL: foo
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
index 8eee33af24ad..5243076ea8b0 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GPRIDX %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=MOVREL %s
-; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
; FIXME: Need constant bus fixup pre-gfx10 for movrel
; ERR: Bad machine code: VOP* instruction violates constant bus restriction
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
index 2c7a03c0064c..8ea1d4b659ad 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.xfail.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
+# RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
# ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
index 02f77141b411..8c84c1c5e306 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
@@ -1,3 +1,3 @@
-; RUN: not llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s
+; RUN: not --crash llc -global-isel -march=amdgcn -mcpu=tonga < %S/../lds-zero-initializer.ll 2>&1 | FileCheck %s
; CHECK: error: <unknown>:0:0: in function load_zeroinit_lds_global void (i32 addrspace(1)*, i1): unsupported initializer for address space
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
index ccce93db415f..845bffd1d9f3 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-nand.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o - %s 2>&1| FileCheck -check-prefix=ERROR %s
# This needs to be expanded into a cmpxchg loop.
# TODO: Will AtomicExpand still do this?
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
index 96b33c1b768a..9f2be730569c 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomicrmw-xchg-flat.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -o - %s | FileCheck %s
-# RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
# ERROR: LLVM ERROR: unable to legalize instruction: %2:_(s32) = G_ATOMICRMW_XCHG %0:_(p0), %1:_ :: (load store seq_cst 4) (in function: atomicrmw_xchg_flat_i32)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
index 40e5ccd2c1ea..7a880f86c089 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
index 5ffbeab9872d..6f7ef466394c 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -o - %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: unable to legalize instruction: %1:_(s1), %2:_(s1) = G_UNMERGE_VALUES %0:_(<2 x s1>) (in function: test_unmerge_v2s1)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
index 550a7312cbe1..806a16eb7640 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.release.all.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s
+; RUN: not --crash llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR-GISEL %s
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %S/../llvm.amdgcn.ds.gws.sema.release.all.ll | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %S/../llvm.amdgcn.ds.gws.sema.release.all.ll
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
index 32968c0250b4..7e1d3871616a 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
@@ -1,5 +1,5 @@
-# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s
-# RUN: not llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-fast %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=amdgcn -run-pass=regbankselect -regbankselect-greedy %s -o /dev/null 2>&1 | FileCheck %s
# Check behavior for illegal copies.
diff --git a/llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir b/llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
index 95e0ada80040..eb244190e562 100644
--- a/llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
+++ b/llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o /dev/null %s 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: No live subrange at use ***
# CHECK-NEXT: - function: at_least_one_value_should_be_defined_by_this_mask
diff --git a/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll b/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
index e4d3df91d59d..6ea73ed8c7a9 100644
--- a/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
+++ b/llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-s-branch-bits=4 < %s 2>&1 | FileCheck -check-prefix=FAIL %s
; FIXME: This should be able to compile, but requires inserting an
; extra block to restore the scavenged register.
diff --git a/llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll b/llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
index 2d9183e6a99e..1c5da794a5f3 100644
--- a/llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-to-kernel-undefined.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; FIXME: It should be invalid IR to have a call to a kernel, but this
; is currently relied on, but should be eliminated before codegen.
diff --git a/llvm/test/CodeGen/AMDGPU/call-to-kernel.ll b/llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
index 6b457cfd4bf2..24b019ccefe3 100644
--- a/llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-to-kernel.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
; FIXME: It should be invalid IR to have a call to a kernel, but this
; is currently relied on, but should be eliminated before codegen.
diff --git a/llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll b/llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
index 72c6cfee28df..a37db5a27240 100644
--- a/llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
+++ b/llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
-; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
-; RUN: not llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=verde -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
;CHECK: LLVM ERROR: unable to allocate function argument
define amdgpu_gs { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @_amdgpu_gs_sgpr_i32 (i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 inreg) {
diff --git a/llvm/test/CodeGen/AMDGPU/div_i128.ll b/llvm/test/CodeGen/AMDGPU/div_i128.ll
index 80acf6804ccc..68fe7ec62342 100644
--- a/llvm/test/CodeGen/AMDGPU/div_i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/div_i128.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: unsupported libcall legalization
define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
diff --git a/llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll b/llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
index 25b21326d570..8881d9e7088c 100644
--- a/llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
+++ b/llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
@@ -1,8 +1,8 @@
-; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
-; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -o - %s | FileCheck -check-prefix=HSA-DEFAULT %s
-; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx600 -filetype=obj -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
; Flat instructions should not select if the target device doesn't
; support them. The default device should be able to select for HSA.
diff --git a/llvm/test/CodeGen/AMDGPU/lds-initializer.ll b/llvm/test/CodeGen/AMDGPU/lds-initializer.ll
index 7cfe013b8453..42a9782ad0b7 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-initializer.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-initializer.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: lds: unsupported initializer for address space
diff --git a/llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll b/llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
index 367dd173f781..70bf4e951b99 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: lds: unsupported initializer for address space
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
index 2d690ec76233..8ba2b0e53698 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s
+; RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -o - < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GFX6ERR %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,LOOP,GFX8 %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -o - -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,NOLOOP %s
diff --git a/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll b/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
index 34cbe3963361..6b169e0f18f6 100644
--- a/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
+++ b/llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid register "flat_scratch_lo" for subtarget.
diff --git a/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll b/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
index 6417d28e7aad..178b22f329b1 100644
--- a/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
+++ b/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid type for register "exec".
diff --git a/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll b/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
index 8e248fdfea4c..f05d900b39d6 100644
--- a/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck %s
; CHECK: invalid type for register "m0".
diff --git a/llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll b/llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
index e7346c4c1d4c..c028adf5d938 100644
--- a/llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
+++ b/llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not --crash llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERR %s
; Make sure this doesn't assert on targets without the r128-16
; feature, and instead generates a slection error.
diff --git a/llvm/test/CodeGen/AMDGPU/verify-sop.mir b/llvm/test/CodeGen/AMDGPU/verify-sop.mir
index 53d749f71196..040cd58f28c9 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-sop.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-sop.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants
# CHECK: - instruction: %0:sreg_32_xm0 = S_ADD_I32
diff --git a/llvm/test/CodeGen/ARM/codemodel.ll b/llvm/test/CodeGen/ARM/codemodel.ll
index ec9982faba12..ee435986c611 100644
--- a/llvm/test/CodeGen/ARM/codemodel.ll
+++ b/llvm/test/CodeGen/ARM/codemodel.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=arm-none-eabi -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel
diff --git a/llvm/test/CodeGen/ARM/ldc2l.ll b/llvm/test/CodeGen/ARM/ldc2l.ll
index 58d9509b1672..bdfcbbf7df25 100644
--- a/llvm/test/CodeGen/ARM/ldc2l.ll
+++ b/llvm/test/CodeGen/ARM/ldc2l.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ldc2l
define void @ldc2l(i8* %i) nounwind {
diff --git a/llvm/test/CodeGen/ARM/machine-verifier.mir b/llvm/test/CodeGen/ARM/machine-verifier.mir
index c5d678c38cfa..eab4d45e5ab0 100644
--- a/llvm/test/CodeGen/ARM/machine-verifier.mir
+++ b/llvm/test/CodeGen/ARM/machine-verifier.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=thumb -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser runs the machine verifier after parsing.
--- |
diff --git a/llvm/test/CodeGen/ARM/named-reg-alloc.ll b/llvm/test/CodeGen/ARM/named-reg-alloc.ll
index d41fa64882c8..535149a67455 100644
--- a/llvm/test/CodeGen/ARM/named-reg-alloc.ll
+++ b/llvm/test/CodeGen/ARM/named-reg-alloc.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/ARM/named-reg-notareg.ll b/llvm/test/CodeGen/ARM/named-reg-notareg.ll
index 45cb38f30f35..0af948250050 100644
--- a/llvm/test/CodeGen/ARM/named-reg-notareg.ll
+++ b/llvm/test/CodeGen/ARM/named-reg-notareg.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=arm-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/ARM/special-reg-acore.ll b/llvm/test/CodeGen/ARM/special-reg-acore.ll
index 3d65ff44bfb0..30e59b14685f 100644
--- a/llvm/test/CodeGen/ARM/special-reg-acore.ll
+++ b/llvm/test/CodeGen/ARM/special-reg-acore.ll
@@ -1,5 +1,5 @@
; RUN: llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE
-; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE
+; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=MCORE
; MCORE: LLVM ERROR: Invalid register name "cpsr".
diff --git a/llvm/test/CodeGen/ARM/special-reg-mcore.ll b/llvm/test/CodeGen/ARM/special-reg-mcore.ll
index 1ecf8dc77a70..dff02ce2ea44 100644
--- a/llvm/test/CodeGen/ARM/special-reg-mcore.ll
+++ b/llvm/test/CodeGen/ARM/special-reg-mcore.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 --show-mc-encoding 2>&1 | FileCheck %s --check-prefix=MCORE
-; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE
-; RUN: not llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE
+; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m3 2>&1 | FileCheck %s --check-prefix=M3CORE
+; RUN: not --crash llc < %s -mtriple=arm-none-eabi -mcpu=cortex-a8 2>&1 | FileCheck %s --check-prefix=ACORE
; ACORE: LLVM ERROR: Invalid register name "control".
; M3CORE: LLVM ERROR: Invalid register name "xpsr_nzcvqg".
diff --git a/llvm/test/CodeGen/ARM/special-reg-v8m-base.ll b/llvm/test/CodeGen/ARM/special-reg-v8m-base.ll
index 20284daa0463..5b74a55fe8c8 100644
--- a/llvm/test/CodeGen/ARM/special-reg-v8m-base.ll
+++ b/llvm/test/CodeGen/ARM/special-reg-v8m-base.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M
+; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M
; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s
; V7M: LLVM ERROR: Invalid register name "sp_ns".
diff --git a/llvm/test/CodeGen/ARM/special-reg-v8m-main.ll b/llvm/test/CodeGen/ARM/special-reg-v8m-main.ll
index 88f238cb83a0..9a314fa4c771 100644
--- a/llvm/test/CodeGen/ARM/special-reg-v8m-main.ll
+++ b/llvm/test/CodeGen/ARM/special-reg-v8m-main.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE
+; RUN: not --crash llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE
; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE
; BASELINE: LLVM ERROR: Invalid register name "faultmask_ns".
diff --git a/llvm/test/CodeGen/ARM/ssat-lower.ll b/llvm/test/CodeGen/ARM/ssat-lower.ll
index 9f0cd0364bcf..93930298fb48 100644
--- a/llvm/test/CodeGen/ARM/ssat-lower.ll
+++ b/llvm/test/CodeGen/ARM/ssat-lower.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
diff --git a/llvm/test/CodeGen/ARM/ssat-upper.ll b/llvm/test/CodeGen/ARM/ssat-upper.ll
index e53f82b3efa3..9fcab67b4a73 100644
--- a/llvm/test/CodeGen/ARM/ssat-upper.ll
+++ b/llvm/test/CodeGen/ARM/ssat-upper.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
diff --git a/llvm/test/CodeGen/ARM/ssat-v4t.ll b/llvm/test/CodeGen/ARM/ssat-v4t.ll
index 3d74c88da827..42511f92fdc5 100644
--- a/llvm/test/CodeGen/ARM/ssat-v4t.ll
+++ b/llvm/test/CodeGen/ARM/ssat-v4t.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
; CHECK: Cannot select: intrinsic %llvm.arm.ssat
define i32 @ssat() nounwind {
diff --git a/llvm/test/CodeGen/ARM/stc2.ll b/llvm/test/CodeGen/ARM/stc2.ll
index 1127796387bb..c4d7ff007f51 100644
--- a/llvm/test/CodeGen/ARM/stc2.ll
+++ b/llvm/test/CodeGen/ARM/stc2.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=armv8-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=thumbv8-eabi 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.stc2
define void @stc2(i8* %i) nounwind {
diff --git a/llvm/test/CodeGen/ARM/usat-lower.ll b/llvm/test/CodeGen/ARM/usat-lower.ll
index 58d3bba5a1f8..3d7b24d9373e 100644
--- a/llvm/test/CodeGen/ARM/usat-lower.ll
+++ b/llvm/test/CodeGen/ARM/usat-lower.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
diff --git a/llvm/test/CodeGen/ARM/usat-upper.ll b/llvm/test/CodeGen/ARM/usat-upper.ll
index 84ad694725b4..4f186a013cd8 100644
--- a/llvm/test/CodeGen/ARM/usat-upper.ll
+++ b/llvm/test/CodeGen/ARM/usat-upper.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
-; RUN: not llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s
; immediate argument > upper-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
diff --git a/llvm/test/CodeGen/ARM/usat-v4t.ll b/llvm/test/CodeGen/ARM/usat-v4t.ll
index 572c760e3ae6..9cc75846ca36 100644
--- a/llvm/test/CodeGen/ARM/usat-v4t.ll
+++ b/llvm/test/CodeGen/ARM/usat-v4t.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc -O1 -mtriple=armv4t-none-none-eabi %s -o - 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.usat
define i32 @usat1() nounwind {
diff --git a/llvm/test/CodeGen/BPF/sdiv_error.ll b/llvm/test/CodeGen/BPF/sdiv_error.ll
index 053b82dd98fa..fc79a1d44c16 100644
--- a/llvm/test/CodeGen/BPF/sdiv_error.ll
+++ b/llvm/test/CodeGen/BPF/sdiv_error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=bpf < %s 2> %t1
+; RUN: not --crash llc -march=bpf < %s 2> %t1
; RUN: FileCheck %s < %t1
; CHECK: Unsupport signed division
diff --git a/llvm/test/CodeGen/BPF/xadd.ll b/llvm/test/CodeGen/BPF/xadd.ll
index 0bf8576df1c7..6fd0a1f644bb 100644
--- a/llvm/test/CodeGen/BPF/xadd.ll
+++ b/llvm/test/CodeGen/BPF/xadd.ll
@@ -1,7 +1,7 @@
-; RUN: not llc -march=bpfel < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=bpfeb < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=bpfel < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=bpfeb < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=bpfel -mattr=+alu32 < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=bpfeb -mattr=+alu32 < %s 2>&1 | FileCheck %s
; This file is generated with the source command and source
; $ clang -target bpf -O2 -g -S -emit-llvm t.c
diff --git a/llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll b/llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
index cb1b30f3a819..76cc8b681b6a 100644
--- a/llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
+++ b/llvm/test/CodeGen/Generic/llc-start-stop-instance-errors.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \
+; RUN: not --crash llc -debug-pass=Structure -stop-after=dead-mi-elimination,arst %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=NOT-NUM %s
; NOT-NUM: LLVM ERROR: invalid pass instance specifier dead-mi-elimination,arst
diff --git a/llvm/test/CodeGen/Generic/llc-start-stop.ll b/llvm/test/CodeGen/Generic/llc-start-stop.ll
index fa34838a411f..4f2e708c4f2e 100644
--- a/llvm/test/CodeGen/Generic/llc-start-stop.ll
+++ b/llvm/test/CodeGen/Generic/llc-start-stop.ll
@@ -23,16 +23,16 @@
; START-BEFORE: Loop Strength Reduction
; START-BEFORE-NEXT: Basic Alias Analysis (stateless AA impl)
-; RUN: not llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE
-; RUN: not llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE
-; RUN: not llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER
-; RUN: not llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER
+; RUN: not --crash llc < %s -start-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-BEFORE
+; RUN: not --crash llc < %s -stop-before=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-BEFORE
+; RUN: not --crash llc < %s -start-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-START-AFTER
+; RUN: not --crash llc < %s -stop-after=nonexistent -o /dev/null 2>&1 | FileCheck %s -check-prefix=NONEXISTENT-STOP-AFTER
; NONEXISTENT-START-BEFORE: "nonexistent" pass is not registered.
; NONEXISTENT-STOP-BEFORE: "nonexistent" pass is not registered.
; NONEXISTENT-START-AFTER: "nonexistent" pass is not registered.
; NONEXISTENT-STOP-AFTER: "nonexistent" pass is not registered.
-; RUN: not llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START
-; RUN: not llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP
+; RUN: not --crash llc < %s -start-before=loop-reduce -start-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-START
+; RUN: not --crash llc < %s -stop-before=loop-reduce -stop-after=loop-reduce -o /dev/null 2>&1 | FileCheck %s -check-prefix=DOUBLE-STOP
; DOUBLE-START: start-before and start-after specified!
; DOUBLE-STOP: stop-before and stop-after specified!
diff --git a/llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll b/llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
index c6cb1c2b657b..413f09ba55dd 100644
--- a/llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
+++ b/llvm/test/CodeGen/Generic/opt-codegen-no-target-machine.ll
@@ -1,3 +1,3 @@
-; RUN: not opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s
+; RUN: not --crash opt %s -dwarfehprepare -o - 2>&1 | FileCheck %s
; CHECK: Trying to construct TargetPassConfig without a target machine. Scheduling a CodeGen pass without a target triple set?
diff --git a/llvm/test/CodeGen/Hexagon/misaligned-const-load.ll b/llvm/test/CodeGen/Hexagon/misaligned-const-load.ll
index 37d1155ca275..74b744305a07 100644
--- a/llvm/test/CodeGen/Hexagon/misaligned-const-load.ll
+++ b/llvm/test/CodeGen/Hexagon/misaligned-const-load.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s
; Check that the misaligned load is diagnosed.
; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-load.c:2:10
diff --git a/llvm/test/CodeGen/Hexagon/misaligned-const-store.ll b/llvm/test/CodeGen/Hexagon/misaligned-const-store.ll
index 311a56e13a75..0a5b1aafcc01 100644
--- a/llvm/test/CodeGen/Hexagon/misaligned-const-store.ll
+++ b/llvm/test/CodeGen/Hexagon/misaligned-const-store.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=hexagon < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=hexagon < %s 2>&1 | FileCheck %s
; Check that the misaligned store is diagnosed.
; CHECK: LLVM ERROR: Misaligned constant address: 0x00012345 has alignment 1, but the memory access requires 4, at misaligned-const-store.c:2:10
diff --git a/llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir b/llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
index 149790c98638..fefe24514099 100644
--- a/llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
+++ b/llvm/test/CodeGen/Hexagon/verify-liveness-at-def.mir
@@ -1,8 +1,8 @@
# Using a trick to run simple-register-coalescing twice, that way
# liveintervals should be preserved while running the machine verifier.
#
-# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s
-# RUN: not llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s
+# RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=false -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-NOSUB %s
+# RUN: not --crash llc -o - %s -march=hexagon -hexagon-subreg-liveness=true -run-pass simple-register-coalescing -verify-machineinstrs -run-pass simple-register-coalescing 2>&1 | FileCheck -check-prefix=CHECK-SUB %s
---
name: test_pass
diff --git a/llvm/test/CodeGen/Lanai/codemodel.ll b/llvm/test/CodeGen/Lanai/codemodel.ll
index 72d1d65daf52..acfbabacf33c 100644
--- a/llvm/test/CodeGen/Lanai/codemodel.ll
+++ b/llvm/test/CodeGen/Lanai/codemodel.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=lanai < %s | FileCheck %s
; RUN: llc -march=lanai < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
-; RUN: not llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
-; RUN: not llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s
+; RUN: not --crash llc -march=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
+; RUN: not --crash llc -march=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s
; CHECK-TINY: Target does not support the tiny CodeModel
; CHECK-KERNEL: Target does not support the kernel CodeModel
diff --git a/llvm/test/CodeGen/MIR/X86/machine-verifier.mir b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
index 16a55ea5fea8..17aa16b4a431 100644
--- a/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
+++ b/llvm/test/CodeGen/MIR/X86/machine-verifier.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser runs the machine verifier after parsing.
--- |
diff --git a/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir b/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
index 8f531d96d1d9..3d842f66f0aa 100644
--- a/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
+++ b/llvm/test/CodeGen/MIR/X86/tied-physical-regs-match.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the Machine Verifier detects tied physical registers
# that doesn't match.
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll b/llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
index eb592189e601..84a284a5bf21 100644
--- a/llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
+++ b/llvm/test/CodeGen/Mips/Fast-ISel/double-arg.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \
+; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \
; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s
; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
index 24161ca82382..18bc397480e3 100644
--- a/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
+++ b/llvm/test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \
+; RUN: not --crash llc -march=mipsel -mcpu=mips32r2 -mattr=+soft-float \
; RUN: -O0 -fast-isel-abort=3 -relocation-model=pic < %s
; Test that FastISel aborts instead of trying to lower arguments for soft-float.
diff --git a/llvm/test/CodeGen/Mips/cpus-no-mips64.ll b/llvm/test/CodeGen/Mips/cpus-no-mips64.ll
index 301f6c2152e7..63b0140a8a60 100644
--- a/llvm/test/CodeGen/Mips/cpus-no-mips64.ll
+++ b/llvm/test/CodeGen/Mips/cpus-no-mips64.ll
@@ -1,13 +1,13 @@
; Check that we reject 64-bit mode on 32-bit only CPUs.
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips1 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips2 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r2 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r3 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r5 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips32r6 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
diff --git a/llvm/test/CodeGen/Mips/cpus.ll b/llvm/test/CodeGen/Mips/cpus.ll
index d9377044dca1..182d13b1c7e3 100644
--- a/llvm/test/CodeGen/Mips/cpus.ll
+++ b/llvm/test/CodeGen/Mips/cpus.ll
@@ -57,9 +57,9 @@
; Check that we reject CPUs that are not implemented.
-; RUN: not llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips -mcpu=mips1 2>&1 \
; RUN: | FileCheck %s --check-prefix=ERROR
-; RUN: not llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \
+; RUN: not --crash llc < %s -o /dev/null -mtriple=mips64 -mcpu=mips5 2>&1 \
; RUN: | FileCheck %s --check-prefix=ERROR
; ERROR: LLVM ERROR: Code generation for MIPS-{{.}} is not implemented
diff --git a/llvm/test/CodeGen/Mips/fp64a.ll b/llvm/test/CodeGen/Mips/fp64a.ll
index 317afd7003bb..2bf59052761d 100644
--- a/llvm/test/CodeGen/Mips/fp64a.ll
+++ b/llvm/test/CodeGen/Mips/fp64a.ll
@@ -7,16 +7,16 @@
; We don't test MIPS32r1 since support for 64-bit coprocessors (such as a 64-bit
; FPU) on a 32-bit architecture was added in MIPS32r2.
-; RUN: not llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64
+; RUN: not --crash llc -march=mips -mcpu=mips32 -mattr=fp64 < %s 2>&1 | FileCheck %s -check-prefix=32R1-FP64
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-BE
; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-FP64A-LE
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=ALL,32R2-FP64A
; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A
-; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
+; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP64A
-; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
+; RUN: not --crash llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-prefix=64-FP64A
; 32R1-FP64: LLVM ERROR: FPU with 64-bit registers is not available on MIPS32 pre revision 2. Use -mcpu=mips32r2 or greater.
; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI.
diff --git a/llvm/test/CodeGen/Mips/fpxx.ll b/llvm/test/CodeGen/Mips/fpxx.ll
index 6fdb95efe8ec..075eff1e580f 100644
--- a/llvm/test/CodeGen/Mips/fpxx.ll
+++ b/llvm/test/CodeGen/Mips/fpxx.ll
@@ -5,10 +5,10 @@
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,32R2-FPXX
; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,4-NOFPXX
-; RUN: not llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX
+; RUN: not --crash llc -march=mips64 -mcpu=mips4 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=4-FPXX
; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,64-NOFPXX
-; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX
+; RUN: not --crash llc -march=mips64 -mcpu=mips64 -mattr=fpxx < %s 2>&1 | FileCheck %s -check-prefix=64-FPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 < %s | FileCheck %s -check-prefixes=ALL,4-O32-NOFPXX
; RUN-TODO: llc -march=mips64 -mcpu=mips4 -target-abi o32 -mattr=fpxx < %s | FileCheck %s -check-prefixes=ALL,4-O32-FPXX
diff --git a/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir b/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
index b1d177a22eaa..02fef74eeefb 100644
--- a/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
+++ b/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-call.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
+# RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
# RUN: -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \
# RUN: | FileCheck %s
diff --git a/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir b/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
index e13c93bec248..d313cad4d8d5 100644
--- a/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
+++ b/llvm/test/CodeGen/Mips/indirect-jump-hazard/guards-verify-tailcall.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
+# RUN: not --crash llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 %s \
# RUN: -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs -mattr=+use-indirect-jump-hazard -o - 2>&1 \
# RUN: | FileCheck %s
diff --git a/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll b/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
index 99612525ae3c..23841d31e0b4 100644
--- a/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
+++ b/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-micromips.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32r2 -mattr=+micromips,+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
; Test that microMIPS and indirect jump with hazard barriers is not supported.
diff --git a/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll b/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
index 48baedf53eaa..be27eea5dacb 100644
--- a/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
+++ b/llvm/test/CodeGen/Mips/indirect-jump-hazard/unsupported-mips32.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=mips-unknown-linux -mcpu=mips32 -mattr=+use-indirect-jump-hazard %s 2>&1 | FileCheck %s
; Test that mips32 and indirect jump with hazard barriers is not supported.
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
index a93231b72a00..02dd9085c31e 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-size.mir b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
index 6ba7243cdfb5..97cb085eac50 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
index fbf84819a0f6..e76af1be9493 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
index d4cf55bf6ca0..264968382447 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
index cd9fd2de915a..fc24a2756c6a 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
index 782596ec4ece..7001221bb0db 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
index 418c98f44fdf..b9e3b8c169e4 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
index 70f12dd1a91c..8407a7a836f7 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
index ec6f24aed187..d72837850cfb 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
index 13a7c6536da1..71d4242c948c 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
index 63e6f9193c9a..35848a936e5c 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
index bec2fc034316..a00d3cf715a7 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
index 90dced0435d4..0bbbdd232245 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
index 9c8c247f9ea3..c1f5f044bdee 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
index 4209a8ddf61e..9f9953a85565 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
index 7d4828d92947..12e999d5d488 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
index d4c2f56c408e..f204a3373f76 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
index b9c1d6193c90..c7b16fd50ab0 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
index 23cede00d319..ce2abeb3cdcf 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
index 8b8ae45ded40..57737ea60283 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
index 9220bbdb7472..1e48f1e8a236 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position + Size is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
index 3932d174be91..c72e6f5a3be3 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Position operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
index 4f5348c29515..92319bd3ff8a 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
+# RUN: not --crash llc -march=mips64 -mcpu=mips64r2 -start-after=finalize-isel -stop-after=finalize-isel \
# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
# CHECK: Size operand is out of range!
diff --git a/llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll b/llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
index 9626bda45f51..02c0e3d5b776 100644
--- a/llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
+++ b/llvm/test/CodeGen/Mips/interrupt-attr-64-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t
+; RUN: not --crash llc -mcpu=mips64r6 -march=mipsel -target-abi n64 -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is only supported for the O32 ABI on MIPS32R2+ at the present time.
diff --git a/llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll b/llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
index 993629bdbcd6..dd2cf443c7ce 100644
--- a/llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
+++ b/llvm/test/CodeGen/Mips/interrupt-attr-args-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t
+; RUN: not --crash llc -mcpu=mips32r2 -march=mipsel -relocation-model=static < %s 2> %t
; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments!
diff --git a/llvm/test/CodeGen/Mips/interrupt-attr-error.ll b/llvm/test/CodeGen/Mips/interrupt-attr-error.ll
index f35e98ea14bf..d84e511a23f1 100644
--- a/llvm/test/CodeGen/Mips/interrupt-attr-error.ll
+++ b/llvm/test/CodeGen/Mips/interrupt-attr-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t
+; RUN: not --crash llc -mcpu=mips32 -march=mipsel -relocation-model=static < %s 2>%t
; RUN: FileCheck %s < %t
; CHECK: LLVM ERROR: "interrupt" attribute is not supported on pre-MIPS32R2 or MIPS16 targets.
diff --git a/llvm/test/CodeGen/Mips/micromips64-unsupported.ll b/llvm/test/CodeGen/Mips/micromips64-unsupported.ll
index 713722ea1200..0f24167e3150 100644
--- a/llvm/test/CodeGen/Mips/micromips64-unsupported.ll
+++ b/llvm/test/CodeGen/Mips/micromips64-unsupported.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6
-; RUN: not llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64
+; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64r6 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64R6
+; RUN: not --crash llc -mtriple=mips64-unknown-linux -mcpu=mips64 -mattr=+micromips %s 2>&1 | FileCheck %s --check-prefix=MICROMIPS64
; Test that microMIPS64(R6) is not supported.
diff --git a/llvm/test/CodeGen/Mips/mips32r6/compatibility.ll b/llvm/test/CodeGen/Mips/mips32r6/compatibility.ll
index 8eac8d4683d1..1adb1bc944e1 100644
--- a/llvm/test/CodeGen/Mips/mips32r6/compatibility.ll
+++ b/llvm/test/CodeGen/Mips/mips32r6/compatibility.ll
@@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -mcpu=mips32r6 < %s | FileCheck %s
-; RUN: not llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
+; RUN: not --crash llc -march=mipsel -mcpu=mips32r6 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo:
; DSP: MIPS32r6 is not compatible with the DSP ASE
diff --git a/llvm/test/CodeGen/Mips/mips64r6/compatibility.ll b/llvm/test/CodeGen/Mips/mips64r6/compatibility.ll
index 174f4ce1771a..8b7607eccc75 100644
--- a/llvm/test/CodeGen/Mips/mips64r6/compatibility.ll
+++ b/llvm/test/CodeGen/Mips/mips64r6/compatibility.ll
@@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 < %s | FileCheck %s
-; RUN: not llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
+; RUN: not --crash llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -mattr=+dsp < %s 2>&1 | FileCheck --check-prefix=DSP %s
; CHECK: foo:
; DSP: MIPS64r6 is not compatible with the DSP ASE
diff --git a/llvm/test/CodeGen/Mips/msa/3r-a.ll b/llvm/test/CodeGen/Mips/msa/3r-a.ll
index 933c4ed6946d..47d8eaa68beb 100644
--- a/llvm/test/CodeGen/Mips/msa/3r-a.ll
+++ b/llvm/test/CodeGen/Mips/msa/3r-a.ll
@@ -5,7 +5,7 @@
; RUN: llc -march=mipsel -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s | FileCheck %s
; It should fail to compile without fp64.
-; RUN: not llc -march=mips -mattr=+msa < %s 2>&1 | \
+; RUN: not --crash llc -march=mips -mattr=+msa < %s 2>&1 | \
; RUN: FileCheck -check-prefix=FP32ERROR %s
; FP32ERROR: LLVM ERROR: MSA requires a 64-bit FPU register file (FR=1 mode).
diff --git a/llvm/test/CodeGen/Mips/msa/immediates-bad.ll b/llvm/test/CodeGen/Mips/msa/immediates-bad.ll
index efb3dfc4be4e..cd0ef21d0022 100644
--- a/llvm/test/CodeGen/Mips/msa/immediates-bad.ll
+++ b/llvm/test/CodeGen/Mips/msa/immediates-bad.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1
+; RUN: not --crash llc -march=mips -mattr=+msa,+fp64,+mips32r2 -relocation-model=pic < %s 2> %t1
; RUN: FileCheck %s < %t1
; Test that the immediate intrinsics with out of range values trigger an error.
diff --git a/llvm/test/CodeGen/NVPTX/alias.ll b/llvm/test/CodeGen/NVPTX/alias.ll
index a27851927696..6dad3845b086 100644
--- a/llvm/test/CodeGen/NVPTX/alias.ll
+++ b/llvm/test/CodeGen/NVPTX/alias.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies gracefully when given an alias.
diff --git a/llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll b/llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
index d435c1d14fee..7294958dcd7a 100644
--- a/llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
+++ b/llvm/test/CodeGen/NVPTX/fcos-no-fast-math.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that we fail to select fcos without fast-math enabled
diff --git a/llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll b/llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
index 56396b849250..083aa1da3e22 100644
--- a/llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
+++ b/llvm/test/CodeGen/NVPTX/fsin-no-fast-math.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that we fail to select fsin without fast-math enabled
diff --git a/llvm/test/CodeGen/NVPTX/global-ctor.ll b/llvm/test/CodeGen/NVPTX/global-ctor.ll
index 89155db08ea5..b7206dce6612 100644
--- a/llvm/test/CodeGen/NVPTX/global-ctor.ll
+++ b/llvm/test/CodeGen/NVPTX/global-ctor.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies when given a nonempty global ctor.
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
diff --git a/llvm/test/CodeGen/NVPTX/global-dtor.ll b/llvm/test/CodeGen/NVPTX/global-dtor.ll
index 9d01f9bd387c..6125b65c4091 100644
--- a/llvm/test/CodeGen/NVPTX/global-dtor.ll
+++ b/llvm/test/CodeGen/NVPTX/global-dtor.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx -mcpu=sm_20 2>&1 | FileCheck %s
; Check that llc dies when given a nonempty global dtor.
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
diff --git a/llvm/test/CodeGen/NVPTX/libcall-instruction.ll b/llvm/test/CodeGen/NVPTX/libcall-instruction.ll
index a40a504c94cb..33bd9a4c8e38 100644
--- a/llvm/test/CodeGen/NVPTX/libcall-instruction.ll
+++ b/llvm/test/CodeGen/NVPTX/libcall-instruction.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s
; used to panic on failed assertion and now fails with an "Undefined external symbol"
; CHECK: LLVM ERROR: Undefined external symbol "__umodti3"
diff --git a/llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll b/llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
index 0b5e0224399d..4778667002c4 100644
--- a/llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
+++ b/llvm/test/CodeGen/NVPTX/libcall-intrinsic.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=nvptx 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=nvptx 2>&1 | FileCheck %s
; used to seqfault and now fails with an "Undefined external symbol"
; CHECK: LLVM ERROR: Undefined external symbol "__powidf2"
diff --git a/llvm/test/CodeGen/PowerPC/aix-byval-param.ll b/llvm/test/CodeGen/PowerPC/aix-byval-param.ll
index 951475438d56..2dfdf7f8535f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-byval-param.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-byval-param.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
%struct.S = type { i32, i32 }
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll b/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
index 59ad57e1bbaf..5be6213398da 100644
--- a/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr8 2>&1 | FileCheck %s
; This test expects a compiler diagnostic for an AIX limitation on Altivec
; support. When the Altivec limitation diagnostic is removed, this test
diff --git a/llvm/test/CodeGen/PowerPC/aix-nest-param.ll b/llvm/test/CodeGen/PowerPC/aix-nest-param.ll
index 8534c80ca643..f768eba31d58 100644
--- a/llvm/test/CodeGen/PowerPC/aix-nest-param.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-nest-param.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
define i8* @nest_receiver(i8* nest %arg) nounwind {
ret i8* %arg
diff --git a/llvm/test/CodeGen/PowerPC/aix-trampoline.ll b/llvm/test/CodeGen/PowerPC/aix-trampoline.ll
index 5c45dc588969..4e5cbb6a7e6e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-trampoline.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-trampoline.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: INIT_TRAMPOLINE operation is not supported on AIX.
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
index 9116ea4e8d9d..b179b86c896a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -8,7 +8,7 @@
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s
-; RUN: not llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: not --crash llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \
; RUN: --check-prefix=64-CHECK %s
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
index d6e772ffc928..a1f1f12f9687 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-only-notoc.ll
@@ -4,7 +4,7 @@
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=OBJ64 %s
; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index d911383dcff9..44a740c7c7ac 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -9,7 +9,7 @@
; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
index 536229fc8c45..ad77eeb349d4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
@@ -6,7 +6,7 @@
; RUN: FileCheck --check-prefix=OBJ %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=OBJ64 %s
; OBJ64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 8b7032af6600..0b8f43f9c791 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -5,7 +5,7 @@
; RUN: llvm-readobj -t %t.o | FileCheck --check-prefix=SYM %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
-; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \
+; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
index e846b39f07c4..05fde17c9527 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -7,7 +7,7 @@
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
-; RUN: not llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
+; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr7 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
; RUN: FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
index 543cca720293..feab85f87bc9 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
@@ -6,7 +6,7 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYM %s
-; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \
+; RUN: not --crash llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o 2>&1 \
; RUN: < %s | FileCheck --check-prefix=XCOFF64 %s
; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
diff --git a/llvm/test/CodeGen/PowerPC/codemodel.ll b/llvm/test/CodeGen/PowerPC/codemodel.ll
index ee3ceae6df23..cbceaf78b176 100644
--- a/llvm/test/CodeGen/PowerPC/codemodel.ll
+++ b/llvm/test/CodeGen/PowerPC/codemodel.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=powerpc-pc-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel
diff --git a/llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll b/llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
index 3f02d4f6c3ef..78cf10ebe688 100644
--- a/llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
+++ b/llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix.ll
@@ -2,7 +2,7 @@
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=SMALL %s
-; RUN: not llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \
+; RUN: not --crash llc -mtriple powerpc-ibm-aix-xcoff -code-model=medium \
; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -code-model=large \
diff --git a/llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll b/llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
index 7e00a595c60a..29119f3257ad 100644
--- a/llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
+++ b/llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix.ll
@@ -2,7 +2,7 @@
; RUN: -stop-after=machine-cp -print-before=simple-register-coalescing 2>&1 < \
; RUN: %s | FileCheck --check-prefix=SMALL %s
-; RUN: not llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \
+; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -code-model=medium \
; RUN: -stop-after=machine-cp 2>&1 < %s | FileCheck --check-prefix=MEDIUM %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -code-model=large \
diff --git a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
index 2506f474cb23..11cb72296e2c 100644
--- a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
+++ b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
@@ -1,6 +1,6 @@
-; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
define i32 @get_reg() nounwind {
entry:
diff --git a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
index de251350861f..3df778f445c7 100644
--- a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
+++ b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s
define i64 @get_reg() nounwind {
entry:
diff --git a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
index 0083f47fd2a5..ca79f857548e 100644
--- a/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
+++ b/llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32
+; RUN: not --crash llc < %s -mtriple=powerpc64-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-NOTPPC32
define i32 @get_reg() nounwind {
entry:
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll b/llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
index 65b45ea555ae..e0ff14e60bb0 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-icbt-pwr7.ll
@@ -1,6 +1,6 @@
; Test the ICBT instruction is not emitted on POWER7
; Based on the ppc64-prefetch.ll test
-; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s
declare void @llvm.prefetch(i8*, i32, i32, i32)
diff --git a/llvm/test/CodeGen/RISCV/get-register-invalid.ll b/llvm/test/CodeGen/RISCV/get-register-invalid.ll
index ee8ec44cef51..1f23445b4f73 100644
--- a/llvm/test/CodeGen/RISCV/get-register-invalid.ll
+++ b/llvm/test/CodeGen/RISCV/get-register-invalid.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=riscv32 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=riscv32 2>&1 | FileCheck %s
define i32 @get_invalid_reg() nounwind {
entry:
diff --git a/llvm/test/CodeGen/RISCV/get-register-reserve.ll b/llvm/test/CodeGen/RISCV/get-register-reserve.ll
index 7549b4dd3f68..87acd70ec62f 100644
--- a/llvm/test/CodeGen/RISCV/get-register-reserve.ll
+++ b/llvm/test/CodeGen/RISCV/get-register-reserve.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \
+; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x8 2>&1 \
; RUN: | FileCheck -check-prefix=NO-RESERVE-A1 %s
-; RUN: not llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \
+; RUN: not --crash llc < %s -mtriple=riscv32 -mattr +reserve-x11 2>&1 \
; RUN: | FileCheck -check-prefix=NO-RESERVE-FP %s
; RUN: llc < %s -mtriple=riscv32 -mattr +reserve-x8 -mattr +reserve-x11 \
; RUN: | FileCheck -check-prefix=RESERVE %s
diff --git a/llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll b/llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
index 5f246cd66298..3458780bfc57 100644
--- a/llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
+++ b/llvm/test/CodeGen/RISCV/interrupt-attr-args-error.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Functions with the interrupt attribute cannot have arguments!
diff --git a/llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll b/llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
index bddca8af7468..2bcec1589df0 100644
--- a/llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
+++ b/llvm/test/CodeGen/RISCV/interrupt-attr-invalid.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Function interrupt attribute argument not supported!
diff --git a/llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll b/llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
index 58827a860608..a865090546fe 100644
--- a/llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
+++ b/llvm/test/CodeGen/RISCV/interrupt-attr-ret-error.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Functions with the interrupt attribute must have void return type!
diff --git a/llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll b/llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
index cb24405b1606..fe4d570b9d90 100644
--- a/llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
+++ b/llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
+; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV64E %s
; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target
diff --git a/llvm/test/CodeGen/RISCV/module-target-abi.ll b/llvm/test/CodeGen/RISCV/module-target-abi.ll
index b2930a06ab74..bc61c50b0822 100644
--- a/llvm/test/CodeGen/RISCV/module-target-abi.ll
+++ b/llvm/test/CodeGen/RISCV/module-target-abi.ll
@@ -2,7 +2,7 @@
; RUN: | FileCheck -check-prefix=DEFAULT %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
-; RUN: not llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
+; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
; RUN: llc -mtriple=riscv32 -filetype=obj < %s | llvm-readelf -h - | FileCheck -check-prefixes=FLAGS %s
diff --git a/llvm/test/CodeGen/RISCV/module-target-abi2.ll b/llvm/test/CodeGen/RISCV/module-target-abi2.ll
index f07f2770ace7..8664c9add069 100644
--- a/llvm/test/CodeGen/RISCV/module-target-abi2.ll
+++ b/llvm/test/CodeGen/RISCV/module-target-abi2.ll
@@ -1,6 +1,6 @@
; RUN: llc -mtriple=riscv32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=DEFAULT %s
-; RUN: not llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
+; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32 < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
diff --git a/llvm/test/CodeGen/RISCV/musttail-call.ll b/llvm/test/CodeGen/RISCV/musttail-call.ll
index 551aa7245ce6..37b0ab456928 100644
--- a/llvm/test/CodeGen/RISCV/musttail-call.ll
+++ b/llvm/test/CodeGen/RISCV/musttail-call.ll
@@ -1,12 +1,12 @@
; Check that we error out if tail is not possible but call is marked as mustail.
-; RUN: not llc -mtriple riscv32-unknown-linux-gnu -o - %s \
+; RUN: not --crash llc -mtriple riscv32-unknown-linux-gnu -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv32-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv32-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv64-unknown-linux-gnu -o - %s \
+; RUN: not --crash llc -mtriple riscv64-unknown-linux-gnu -o - %s \
; RUN: 2>&1 | FileCheck %s
-; RUN: not llc -mtriple riscv64-unknown-elf -o - %s \
+; RUN: not --crash llc -mtriple riscv64-unknown-elf -o - %s \
; RUN: 2>&1 | FileCheck %s
%struct.A = type { i32 }
diff --git a/llvm/test/CodeGen/RISCV/rv32e.ll b/llvm/test/CodeGen/RISCV/rv32e.ll
index 2416639dc93c..88379ab43872 100644
--- a/llvm/test/CodeGen/RISCV/rv32e.ll
+++ b/llvm/test/CodeGen/RISCV/rv32e.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=riscv32 -mattr=+e < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: Codegen not yet implemented for RV32E
diff --git a/llvm/test/CodeGen/RISCV/target-abi-valid.ll b/llvm/test/CodeGen/RISCV/target-abi-valid.ll
index 2bd7dde3cd8e..2d4079601f7b 100644
--- a/llvm/test/CodeGen/RISCV/target-abi-valid.ll
+++ b/llvm/test/CodeGen/RISCV/target-abi-valid.ll
@@ -34,7 +34,7 @@ define void @nothing() nounwind {
ret void
}
-; RUN: not llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \
+; RUN: not --crash llc -mtriple=riscv32 -target-abi ilp32e < %s 2>&1 \
; RUN: | FileCheck -check-prefix=CHECK-UNIMP %s
; CHECK-UNIMP: LLVM ERROR: Don't know how to lower this ABI
diff --git a/llvm/test/CodeGen/RISCV/verify-instr.mir b/llvm/test/CodeGen/RISCV/verify-instr.mir
index ed31126b53d4..58fcbc3e47de 100644
--- a/llvm/test/CodeGen/RISCV/verify-instr.mir
+++ b/llvm/test/CodeGen/RISCV/verify-instr.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=riscv32 -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: Invalid immediate ***
# CHECK: - instruction: $x2 = ADDI $x1, 10000
diff --git a/llvm/test/CodeGen/SPARC/codemodel.ll b/llvm/test/CodeGen/SPARC/codemodel.ll
index 68da48a0e950..fae56b801c9c 100644
--- a/llvm/test/CodeGen/SPARC/codemodel.ll
+++ b/llvm/test/CodeGen/SPARC/codemodel.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=sparc64-unknown-linux -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel
diff --git a/llvm/test/CodeGen/SPARC/fail-alloca-align.ll b/llvm/test/CodeGen/SPARC/fail-alloca-align.ll
index b8d84a901f56..062e3a4489f2 100644
--- a/llvm/test/CodeGen/SPARC/fail-alloca-align.ll
+++ b/llvm/test/CodeGen/SPARC/fail-alloca-align.ll
@@ -2,8 +2,8 @@
;; alignment greater than the stack alignment. This code ought to
;; compile, but doesn't currently.
-;; RUN: not llc -march=sparc < %s 2>&1 | FileCheck %s
-;; RUN: not llc -march=sparcv9 < %s 2>&1 | FileCheck %s
+;; RUN: not --crash llc -march=sparc < %s 2>&1 | FileCheck %s
+;; RUN: not --crash llc -march=sparcv9 < %s 2>&1 | FileCheck %s
;; CHECK: ERROR: Function {{.*}} required stack re-alignment
define void @variable_alloca_with_overalignment(i32 %num) {
diff --git a/llvm/test/CodeGen/SPARC/sret-secondary.ll b/llvm/test/CodeGen/SPARC/sret-secondary.ll
index 4efcabfc6fb3..8f334e823834 100644
--- a/llvm/test/CodeGen/SPARC/sret-secondary.ll
+++ b/llvm/test/CodeGen/SPARC/sret-secondary.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -march=sparc < %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: sparc only supports sret on the first parameter
diff --git a/llvm/test/CodeGen/SystemZ/codemodel.ll b/llvm/test/CodeGen/SystemZ/codemodel.ll
index 4375366cfd79..a96a28a5167c 100644
--- a/llvm/test/CodeGen/SystemZ/codemodel.ll
+++ b/llvm/test/CodeGen/SystemZ/codemodel.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
-; RUN: not llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=tiny < %s 2>&1 | FileCheck %s --check-prefix=TINY
+; RUN: not --crash llc -verify-machineinstrs -o - -mtriple=s390x-linux-gnu -code-model=kernel < %s 2>&1 | FileCheck %s --check-prefix=KERNEL
; TINY: Target does not support the tiny CodeModel
; KERNEL: Target does not support the kernel CodeModel
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-02.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-02.ll
index 1d13429d2084..dfe3b2694172 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-02.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-02.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; Check that no more than 12 integer arguments are passed
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind {
entry:
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-03.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-03.ll
index 1db7a3ff3dbb..1761cc4f09b7 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-03.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-03.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; In GHC calling convention the only allowed return type is void
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc i64 @foo() nounwind {
entry:
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-04.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-04.ll
index 0dbe5472207a..d6b089808cf7 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-04.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-04.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; Thread local storage is not supported in GHC calling convention
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
@x = thread_local global i32 0
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-05.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-05.ll
index be2cc67807bf..68c0ee2e9ed9 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-05.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-05.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; Variable-sized stack allocations are not supported in GHC calling convention
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind {
entry:
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-06.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-06.ll
index 04df248c29f8..e0213e925936 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-06.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-06.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; At most 2048*sizeof(long)=16384 bytes of stack space may be used
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo() nounwind {
entry:
diff --git a/llvm/test/CodeGen/SystemZ/ghc-cc-07.ll b/llvm/test/CodeGen/SystemZ/ghc-cc-07.ll
index e9bb3b5e18a3..278e64303803 100644
--- a/llvm/test/CodeGen/SystemZ/ghc-cc-07.ll
+++ b/llvm/test/CodeGen/SystemZ/ghc-cc-07.ll
@@ -1,7 +1,7 @@
; Check that the GHC calling convention works (s390x)
; In GHC calling convention a frame pointer is not supported
;
-; RUN: not llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=s390x-ibm-linux < %s 2>&1 | FileCheck %s
define ghccc void @foo(i64 %0) nounwind {
entry:
diff --git a/llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll b/llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
index 4a3629111318..d6bb1ae7150a 100644
--- a/llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
+++ b/llvm/test/CodeGen/SystemZ/mnop-mcount-02.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
;
; CHECK: LLVM ERROR: mnop-mcount only supported with fentry-call
diff --git a/llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll b/llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
index 9ce7cdd418e3..e1f4a3748b76 100644
--- a/llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
+++ b/llvm/test/CodeGen/SystemZ/mrecord-mcount-02.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc %s -mtriple=s390x-linux-gnu -o - 2>&1 | FileCheck %s
;
; CHECK: LLVM ERROR: mrecord-mcount only supported with fentry-call
diff --git a/llvm/test/CodeGen/SystemZ/mverify-optypes.mir b/llvm/test/CodeGen/SystemZ/mverify-optypes.mir
index aebafd395623..cc0be4423348 100644
--- a/llvm/test/CodeGen/SystemZ/mverify-optypes.mir
+++ b/llvm/test/CodeGen/SystemZ/mverify-optypes.mir
@@ -1,6 +1,5 @@
-# RUN: not llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \
+# RUN: not --crash llc -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass=none -o - %s \
# RUN: 2>&1 | FileCheck %s
-# REQUIRES: asserts
#
# Test that the machine verifier catches wrong operand types.
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-01.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-01.ll
index e2f537949595..5680873fb8ee 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-01.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-01.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define void @foo(<1 x i128>) {
ret void
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-02.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-02.ll
index a5ae1102a748..7c0efe5b8afe 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-02.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-02.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define <1 x i128> @foo() {
ret <1 x i128><i128 0>
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-03.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-03.ll
index 14698aae43bc..7c8be0136345 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-03.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-03.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare void @bar(<1 x i128>)
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-04.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-04.ll
index a54ee90022c8..f0b248c93486 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-04.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-04.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare <1 x i128> @bar()
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-05.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-05.ll
index 067deb1c88b8..c04095e7a737 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-05.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-05.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define void @foo(<1 x fp128>) {
ret void
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-06.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-06.ll
index a9184d735750..73891be036a8 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-06.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-06.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
define <1 x fp128> @foo() {
ret <1 x fp128><fp128 0xL00000000000000000000000000000000>
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-07.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-07.ll
index 4e9140093915..4914217f0026 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-07.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-07.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare void @bar(<1 x fp128>)
diff --git a/llvm/test/CodeGen/SystemZ/vec-args-error-08.ll b/llvm/test/CodeGen/SystemZ/vec-args-error-08.ll
index 7b16b9f46e39..8670b8fa4c78 100644
--- a/llvm/test/CodeGen/SystemZ/vec-args-error-08.ll
+++ b/llvm/test/CodeGen/SystemZ/vec-args-error-08.ll
@@ -1,6 +1,6 @@
; Verify that we detect unsupported single-element vector types.
-; RUN: not llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 2>&1 | FileCheck %s
declare <1 x fp128> @bar()
diff --git a/llvm/test/CodeGen/WebAssembly/clear-cache.ll b/llvm/test/CodeGen/WebAssembly/clear-cache.ll
index cab948828233..4e1aee438ebe 100644
--- a/llvm/test/CodeGen/WebAssembly/clear-cache.ll
+++ b/llvm/test/CodeGen/WebAssembly/clear-cache.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -asm-verbose=false 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -asm-verbose=false 2>&1 | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
target triple = "wasm32-unknown-unknown"
diff --git a/llvm/test/CodeGen/WebAssembly/cpus.ll b/llvm/test/CodeGen/WebAssembly/cpus.ll
index 01964e9c85ab..b9210bd4d7f9 100644
--- a/llvm/test/CodeGen/WebAssembly/cpus.ll
+++ b/llvm/test/CodeGen/WebAssembly/cpus.ll
@@ -1,13 +1,13 @@
; This tests that llc accepts all valid WebAssembly CPUs.
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=mvp 2>&1 | FileCheck %s
-; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=mvp 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
-; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=generic 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=bleeding-edge 2>&1 | FileCheck %s
-; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=bleeding-edge 2>&1 | FileCheck %s --check-prefix=WASM64
; RUN: llc < %s -asm-verbose=false -mtriple=wasm32-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
-; RUN: not llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64
+; RUN: not --crash llc < %s -asm-verbose=false -mtriple=wasm64-unknown-unknown-wasm -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=WASM64
; CHECK-NOT: is not a recognized processor for this target
; INVALID: {{.+}} is not a recognized processor for this target
diff --git a/llvm/test/CodeGen/WebAssembly/exception.ll b/llvm/test/CodeGen/WebAssembly/exception.ll
index af470b27e89d..375b4c0c4376 100644
--- a/llvm/test/CodeGen/WebAssembly/exception.ll
+++ b/llvm/test/CodeGen/WebAssembly/exception.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm
+; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s
; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling
diff --git a/llvm/test/CodeGen/WebAssembly/offset-atomics.ll b/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
index 6884b6a56ee7..43966a80ba4e 100644
--- a/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
+++ b/llvm/test/CodeGen/WebAssembly/offset-atomics.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
+; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
; Test that atomic loads are assembled properly.
diff --git a/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll b/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
index 41dbd476b065..1ce100b8653c 100644
--- a/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
+++ b/llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR
-; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
diff --git a/llvm/test/CodeGen/X86/AppendingLinkage.ll b/llvm/test/CodeGen/X86/AppendingLinkage.ll
index 5ab49a28e96d..83bfbe85240a 100644
--- a/llvm/test/CodeGen/X86/AppendingLinkage.ll
+++ b/llvm/test/CodeGen/X86/AppendingLinkage.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=i686-- 2>&1 | FileCheck %s
; CHECK: unknown special variable
@foo = appending constant [1 x i32 ]zeroinitializer
diff --git a/llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir b/llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
index 31f1da5c674f..2c70ed3b0451 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/avoid-matchtable-crash.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -run-pass=instruction-select -pass-remarks-missed=gisel %s 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--linux-gnu"
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
index 77962d7fbfa3..fd726b882b56 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent offset between bb.end and one of
# its precedessors.
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
index 1a247824bc9e..30344edc259c 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent register between bb.end and one of
# its precedessors.
diff --git a/llvm/test/CodeGen/X86/clwb.ll b/llvm/test/CodeGen/X86/clwb.ll
index 90862343d31c..75ca48329eed 100644
--- a/llvm/test/CodeGen/X86/clwb.ll
+++ b/llvm/test/CodeGen/X86/clwb.ll
@@ -3,7 +3,7 @@
; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch.
; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s
-; RUN: not llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
+; RUN: not --crash llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-client | FileCheck %s
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/codemodel.ll b/llvm/test/CodeGen/X86/codemodel.ll
index d7ed7c460889..9aba38ab3a26 100644
--- a/llvm/test/CodeGen/X86/codemodel.ll
+++ b/llvm/test/CodeGen/X86/codemodel.ll
@@ -1,6 +1,6 @@
; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
-; RUN: not llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
+; RUN: not --crash llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/coff-comdat2.ll b/llvm/test/CodeGen/X86/coff-comdat2.ll
index a417d096c47d..3538e7ec1017 100644
--- a/llvm/test/CodeGen/X86/coff-comdat2.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat2.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/coff-comdat3.ll b/llvm/test/CodeGen/X86/coff-comdat3.ll
index 01651ce4820a..95a23742efae 100644
--- a/llvm/test/CodeGen/X86/coff-comdat3.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat3.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
index 0dadc599abdb..cb5c8f714321 100644
--- a/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
@@ -2,15 +2,15 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
index d28ac9a83fd8..cf133aea6359 100644
--- a/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
@@ -2,22 +2,22 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
index e2e000386717..6f74d4b29dab 100644
--- a/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
@@ -2,10 +2,10 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/equiv_with_fndef.ll b/llvm/test/CodeGen/X86/equiv_with_fndef.ll
index efbb8ab3da69..3da0aa60250c 100644
--- a/llvm/test/CodeGen/X86/equiv_with_fndef.ll
+++ b/llvm/test/CodeGen/X86/equiv_with_fndef.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/equiv_with_vardef.ll b/llvm/test/CodeGen/X86/equiv_with_vardef.ll
index 29c19a107ec3..e5ea3673b6d7 100644
--- a/llvm/test/CodeGen/X86/equiv_with_vardef.ll
+++ b/llvm/test/CodeGen/X86/equiv_with_vardef.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll b/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
index 34f3c258f738..d0d28db04f44 100644
--- a/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
+++ b/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
@@ -1,4 +1,4 @@
-;RUN: not llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK
+; RUN: not --crash llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK
; Make sure we generate fatal error from the type legalizer for using a 64-bit
; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable.
diff --git a/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll b/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
index f7066577f2de..007ac1d9a3c2 100644
--- a/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
@@ -1,5 +1,4 @@
-; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10
-; REQUIRES: asserts
+; RUN: not --crash llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10
%struct.s0 = type { x86_fp80, x86_fp80 }
diff --git a/llvm/test/CodeGen/X86/inalloca-regparm.ll b/llvm/test/CodeGen/X86/inalloca-regparm.ll
index 9dd916bfbb37..d379333a962f 100644
--- a/llvm/test/CodeGen/X86/inalloca-regparm.ll
+++ b/llvm/test/CodeGen/X86/inalloca-regparm.ll
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=i686-windows-msvc < %s -o /dev/null
-; RUN: not llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s
; This will compile successfully on x86 but not x86_64, because %b will become a
; register parameter.
diff --git a/llvm/test/CodeGen/X86/invalid-liveness.mir b/llvm/test/CodeGen/X86/invalid-liveness.mir
index c324241805ad..416921ddcd01 100644
--- a/llvm/test/CodeGen/X86/invalid-liveness.mir
+++ b/llvm/test/CodeGen/X86/invalid-liveness.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s
# REQUIRES: asserts
--- |
diff --git a/llvm/test/CodeGen/X86/label-redefinition.ll b/llvm/test/CodeGen/X86/label-redefinition.ll
index 9e88a18e8732..b5570e6931b9 100644
--- a/llvm/test/CodeGen/X86/label-redefinition.ll
+++ b/llvm/test/CodeGen/X86/label-redefinition.ll
@@ -1,5 +1,5 @@
; PR7054
-; RUN: not llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly"
+; RUN: not --crash llc %s -o - 2>&1 | grep "'_foo' label emitted multiple times to assembly"
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/llc-print-machineinstrs.mir b/llvm/test/CodeGen/X86/llc-print-machineinstrs.mir
index a890840a478a..c3f8df031337 100644
--- a/llvm/test/CodeGen/X86/llc-print-machineinstrs.mir
+++ b/llvm/test/CodeGen/X86/llc-print-machineinstrs.mir
@@ -1,6 +1,6 @@
# Check that -print-machineinstrs doesn't assert when it's passed an unknown pass name.
# RUN: llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=greedy %s -o /dev/null
-# RUN: not llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=x86_64-- -start-before=greedy -print-machineinstrs=unknown %s -o /dev/null 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: "unknown" pass is not registered.
...
diff --git a/llvm/test/CodeGen/X86/macho-comdat.ll b/llvm/test/CodeGen/X86/macho-comdat.ll
index 60560470ed5b..c96212127dba 100644
--- a/llvm/test/CodeGen/X86/macho-comdat.ll
+++ b/llvm/test/CodeGen/X86/macho-comdat.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple x86_64-apple-darwin < %s 2> %t
+; RUN: not --crash llc -mtriple x86_64-apple-darwin < %s 2> %t
; RUN: FileCheck < %t %s
$f = comdat any
diff --git a/llvm/test/CodeGen/X86/named-reg-alloc.ll b/llvm/test/CodeGen/X86/named-reg-alloc.ll
index c33b4eb75d04..34c5ea99f94c 100644
--- a/llvm/test/CodeGen/X86/named-reg-alloc.ll
+++ b/llvm/test/CodeGen/X86/named-reg-alloc.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/named-reg-notareg.ll b/llvm/test/CodeGen/X86/named-reg-notareg.ll
index 18c517d87810..6da65e2dfd02 100644
--- a/llvm/test/CodeGen/X86/named-reg-notareg.ll
+++ b/llvm/test/CodeGen/X86/named-reg-notareg.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/nonconst-static-ev.ll b/llvm/test/CodeGen/X86/nonconst-static-ev.ll
index a0aa6152bd47..23643a2aafdf 100644
--- a/llvm/test/CodeGen/X86/nonconst-static-ev.ll
+++ b/llvm/test/CodeGen/X86/nonconst-static-ev.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t
+; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0)
diff --git a/llvm/test/CodeGen/X86/nonconst-static-iv.ll b/llvm/test/CodeGen/X86/nonconst-static-iv.ll
index b1a03cf8b2e5..0e35116e3f8a 100644
--- a/llvm/test/CodeGen/X86/nonconst-static-iv.ll
+++ b/llvm/test/CodeGen/X86/nonconst-static-iv.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t
+; RUN: not --crash llc -mtriple=i686-linux-gnu < %s 2> %t
; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0)
diff --git a/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll b/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
index 9f78c294ce88..f59388e450ba 100644
--- a/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
+++ b/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_frame() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/segmented-stacks.ll b/llvm/test/CodeGen/X86/segmented-stacks.ll
index c4539f7b1255..467182c9f407 100644
--- a/llvm/test/CodeGen/X86/segmented-stacks.ll
+++ b/llvm/test/CodeGen/X86/segmented-stacks.ll
@@ -22,9 +22,9 @@
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null
-; RUN: not llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log
+; RUN: not --crash llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X64-Solaris
-; RUN: not llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log
+; RUN: not --crash llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X32-FreeBSD
; X64-Solaris: Segmented stacks not supported on this platform
diff --git a/llvm/test/CodeGen/XCore/alignment.ll b/llvm/test/CodeGen/XCore/alignment.ll
index 28bdf3b74208..0c561ee4f6c6 100644
--- a/llvm/test/CodeGen/XCore/alignment.ll
+++ b/llvm/test/CodeGen/XCore/alignment.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
; CHECK: emitPrologue unsupported alignment: 8
define void @f() nounwind {
diff --git a/llvm/test/CodeGen/XCore/codemodel.ll b/llvm/test/CodeGen/XCore/codemodel.ll
index 93b9d6d911df..fdc0d086c679 100644
--- a/llvm/test/CodeGen/XCore/codemodel.ll
+++ b/llvm/test/CodeGen/XCore/codemodel.ll
@@ -1,7 +1,7 @@
-; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
-; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
-; RUN: not llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM
+; RUN: not --crash llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
+; RUN: not --crash llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
+; RUN: not --crash llc < %s -march=xcore -code-model=tiny 2>&1 | FileCheck %s -check-prefix=BAD_CM
; BAD_CM: Target only supports CodeModel Small or Large
diff --git a/llvm/test/CodeGen/XCore/section-name.ll b/llvm/test/CodeGen/XCore/section-name.ll
index 65161db34bea..4bf6aa1fc67a 100644
--- a/llvm/test/CodeGen/XCore/section-name.ll
+++ b/llvm/test/CodeGen/XCore/section-name.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -march=xcore 2>&1 | FileCheck %s
@bar = internal global i32 zeroinitializer
diff --git a/llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll b/llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
index 5e8edf5eb4f5..3f0a584b0e34 100644
--- a/llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
+++ b/llvm/test/DebugInfo/COFF/types-recursive-unnamed.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -filetype=obj 2>&1 | FileCheck %s
+; RUN: not --crash llc < %s -filetype=obj 2>&1 | FileCheck %s
;
; Verify the compiler produces an error message when trying to emit circular
; references to unnamed structs which are not supported in CodeView debug
diff --git a/llvm/test/LTO/X86/attrs.ll b/llvm/test/LTO/X86/attrs.ll
index d1967470cdd3..4444735188fb 100644
--- a/llvm/test/LTO/X86/attrs.ll
+++ b/llvm/test/LTO/X86/attrs.ll
@@ -1,7 +1,7 @@
; RUN: llvm-as < %s >%t1
; RUN: llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=+aes -o %t2 %t1
; RUN: llvm-objdump -d %t2 | FileCheck -check-prefix=WITH_AES %s
-; RUN: not llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s
+; RUN: not --crash llvm-lto -exported-symbol=test_x86_aesni_aeskeygenassist -mattr=-aes -o %t3 %t1 2>&1 | FileCheck -check-prefix=WITHOUT_AES %s
target triple = "x86_64-unknown-linux-gnu"
declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8)
diff --git a/llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s b/llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
index 34d88918a349..e831ac5c2af0 100644
--- a/llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
+++ b/llvm/test/MC/ARM/AlignedBundling/illegal-subtarget-change.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple armv7-linux-gnueabi %s -o - 2>&1 | FileCheck %s
# We cannot switch subtargets mid-bundle
.syntax unified
diff --git a/llvm/test/MC/ARM/Windows/invalid-relocation.s b/llvm/test/MC/ARM/Windows/invalid-relocation.s
index c3e74e97634b..61d11fb6a6b3 100644
--- a/llvm/test/MC/ARM/Windows/invalid-relocation.s
+++ b/llvm/test/MC/ARM/Windows/invalid-relocation.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \
+# RUN: not --crash llvm-mc -triple thumbv7-windows -incremental-linker-compatible -filetype obj -o /dev/null 2>&1 %s \
# RUN: | FileCheck %s
.def invalid_relocation
diff --git a/llvm/test/MC/COFF/section-comdat-conflict.s b/llvm/test/MC/COFF/section-comdat-conflict.s
index 7ed452a5cdcb..2710b76be565 100644
--- a/llvm/test/MC/COFF/section-comdat-conflict.s
+++ b/llvm/test/MC/COFF/section-comdat-conflict.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
+// RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
// CHECK: conflicting sections for symbol
diff --git a/llvm/test/MC/COFF/section-comdat-conflict2.s b/llvm/test/MC/COFF/section-comdat-conflict2.s
index e2dfc2d68b2f..2b863299561c 100644
--- a/llvm/test/MC/COFF/section-comdat-conflict2.s
+++ b/llvm/test/MC/COFF/section-comdat-conflict2.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
+// RUN: not --crash llvm-mc -triple i386-pc-win32 -filetype=obj < %s 2>&1 | FileCheck %s
// CHECK: two sections have the same comdat
diff --git a/llvm/test/MC/Disassembler/AMDGPU/si-support.txt b/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
index f3f5ab946eb3..5538983597f7 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/si-support.txt
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -arch=amdgcn -mcpu=tahiti -disassemble < %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: Disassembly not yet supported for subtarget
0x00 0x00 0x00 0x7e
diff --git a/llvm/test/MC/ELF/ARM/bss-non-zero-value.s b/llvm/test/MC/ELF/ARM/bss-non-zero-value.s
index 999b8b019c9c..da946f1c95d9 100644
--- a/llvm/test/MC/ELF/ARM/bss-non-zero-value.s
+++ b/llvm/test/MC/ELF/ARM/bss-non-zero-value.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out
+// RUN: not --crash llvm-mc -filetype=obj -triple arm-linux-gnu %s -o %t 2>%t.out
// RUN: FileCheck --input-file=%t.out %s
// CHECK: non-zero initializer found in section '.bss'
.bss
diff --git a/llvm/test/MC/ELF/common-error3.s b/llvm/test/MC/ELF/common-error3.s
index a84779e653e0..e5204914970e 100644
--- a/llvm/test/MC/ELF/common-error3.s
+++ b/llvm/test/MC/ELF/common-error3.s
@@ -1,5 +1,5 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s 2>&1 | FileCheck %s
# CHECK: Symbol: C redeclared as
diff erent type
.comm C,4,4
- .comm C,8,4
\ No newline at end of file
+ .comm C,8,4
diff --git a/llvm/test/MC/ELF/section-numeric-invalid-type.s b/llvm/test/MC/ELF/section-numeric-invalid-type.s
index 19796dc64ac1..0e721099ff7c 100644
--- a/llvm/test/MC/ELF/section-numeric-invalid-type.s
+++ b/llvm/test/MC/ELF/section-numeric-invalid-type.s
@@ -1,7 +1,7 @@
// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux-gnu %s -o - \
// RUN: | llvm-readobj -S --symbols | FileCheck --check-prefix=OBJ %s
-// RUN: not llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \
+// RUN: not --crash llvm-mc -filetype=asm -triple=x86_64-pc-linux-gnu %s -o - 2>&1 \
// RUN: | FileCheck --check-prefix=ASM %s
.section .sec,"a", at 0x7fffffff
diff --git a/llvm/test/MC/MachO/variable-errors.s b/llvm/test/MC/MachO/variable-errors.s
index 28308c691d91..952212041d56 100644
--- a/llvm/test/MC/MachO/variable-errors.s
+++ b/llvm/test/MC/MachO/variable-errors.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err
+// RUN: not --crash llvm-mc -triple x86_64-apple-darwin10 %s -filetype=obj -o %t.o 2> %t.err
// RUN: FileCheck < %t.err %s
.data
diff --git a/llvm/test/MC/Mips/micromips64-unsupported.s b/llvm/test/MC/Mips/micromips64-unsupported.s
index bc38cfb41f74..05c4bc9df043 100644
--- a/llvm/test/MC/Mips/micromips64-unsupported.s
+++ b/llvm/test/MC/Mips/micromips64-unsupported.s
@@ -1,8 +1,8 @@
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
+# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
+# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64r6 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64R6
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
-# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
+# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
+# RUN: not --crash llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 -mattr=+micromips | FileCheck %s --check-prefix=64
# 64R6: microMIPS64R6 is not supported
# 64: microMIPS64 is not supported
diff --git a/llvm/test/MC/Mips/micromips64r6-unsupported.s b/llvm/test/MC/Mips/micromips64r6-unsupported.s
index 402e66724e46..d2afff72aa71 100644
--- a/llvm/test/MC/Mips/micromips64r6-unsupported.s
+++ b/llvm/test/MC/Mips/micromips64r6-unsupported.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \
+# RUN: not --crash llvm-mc -filetype=obj -triple=mips64-unknown-linux -mattr=+micromips \
# RUN: -mcpu=mips64r6 %s 2>&1 | FileCheck %s -check-prefix=CHECK-OPTION
# RUN: not llvm-mc -filetype=obj -triple=mips64-unknown-linux -mcpu=mips64r6 \
# RUN: %s 2>&1 | FileCheck %s -check-prefix=CHECK-MM-DIRECTIVE
diff --git a/llvm/test/MC/Mips/nooddspreg-cmdarg.s b/llvm/test/MC/Mips/nooddspreg-cmdarg.s
index 2ccce74a5f15..ef38331b5163 100644
--- a/llvm/test/MC/Mips/nooddspreg-cmdarg.s
+++ b/llvm/test/MC/Mips/nooddspreg-cmdarg.s
@@ -5,10 +5,10 @@
# RUN: llvm-readobj --sections --section-data --section-relocations - | \
# RUN: FileCheck %s -check-prefix=CHECK-OBJ
-# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0
+# RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnuabin32 -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0
#
-# RUN: not llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0
+# RUN: not --crash llvm-mc %s -triple mips64-unknown-linux-gnu -mattr=+nooddspreg 2> %t0
# RUN: FileCheck %s -check-prefix=INVALID < %t0
#
# CHECK-ASM-NOT: .module nooddspreg
diff --git a/llvm/test/MC/PowerPC/ppc64-localentry-error1.s b/llvm/test/MC/PowerPC/ppc64-localentry-error1.s
index e47640fbeb05..c028da8ce619 100644
--- a/llvm/test/MC/PowerPC/ppc64-localentry-error1.s
+++ b/llvm/test/MC/PowerPC/ppc64-localentry-error1.s
@@ -1,7 +1,7 @@
-# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
+# RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
-# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
+# RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
sym:
diff --git a/llvm/test/MC/PowerPC/ppc64-localentry-error2.s b/llvm/test/MC/PowerPC/ppc64-localentry-error2.s
index b05687fe7b6f..89a30ee4c8ac 100644
--- a/llvm/test/MC/PowerPC/ppc64-localentry-error2.s
+++ b/llvm/test/MC/PowerPC/ppc64-localentry-error2.s
@@ -1,7 +1,7 @@
-# RUN: not llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
+# RUN: not --crash llvm-mc -triple powerpc64-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
-# RUN: not llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
+# RUN: not --crash llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj < %s 2> %t
# RUN: FileCheck < %t %s
.globl remote_sym
diff --git a/llvm/test/MC/PowerPC/pr24686.s b/llvm/test/MC/PowerPC/pr24686.s
index 28cba230b8c4..35a379c697ea 100644
--- a/llvm/test/MC/PowerPC/pr24686.s
+++ b/llvm/test/MC/PowerPC/pr24686.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \
+# RUN: not --crash llvm-mc -triple=powerpc64le-unknown-linux-gnu -filetype=obj %s \
# RUN: 2>&1 | FileCheck %s
_stext:
diff --git a/llvm/test/MC/RISCV/mattr-invalid-combination.s b/llvm/test/MC/RISCV/mattr-invalid-combination.s
index 340a2f257875..f75fd3723ed4 100644
--- a/llvm/test/MC/RISCV/mattr-invalid-combination.s
+++ b/llvm/test/MC/RISCV/mattr-invalid-combination.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
+# RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
# RUN: | FileCheck %s -check-prefix=RV64E
# RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target
diff --git a/llvm/test/MC/WebAssembly/blockaddress.ll b/llvm/test/MC/WebAssembly/blockaddress.ll
index 52127ab27c84..2b733e0d37c8 100644
--- a/llvm/test/MC/WebAssembly/blockaddress.ll
+++ b/llvm/test/MC/WebAssembly/blockaddress.ll
@@ -1,6 +1,6 @@
; TODO(sbc): Make this test pass by adding support for unnamed tempoaries
; in wasm relocations.
-; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
target triple = "wasm32-unknown-unknown"
diff --git a/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll b/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
index 7e9b28ac243b..84d7c537a4f4 100644
--- a/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
+++ b/llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: data symbols must live in a data section: data_symbol
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
diff --git a/llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s b/llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
index 5ce788098f36..697b8bf6ab6c 100644
--- a/llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/bundle-group-too-large-error.s
@@ -1,5 +1,5 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mc-relax-all %s -o - 2>&1 | FileCheck %s
# CHECK: ERROR: Fragment can't be larger than a bundle size
diff --git a/llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s b/llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
index b0b595f4812f..b849d2b33300 100644
--- a/llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/bundle-lock-option-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# Missing .bundle_align_mode argument
# CHECK: error: invalid option
diff --git a/llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s b/llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
index 67ac55ed2f03..c02d0d6b19b4 100644
--- a/llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/bundle-subtarget-change-error.s
@@ -1,5 +1,5 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu -mcpu=pentiumpro -mc-relax-all %s -o - 2>&1 | FileCheck %s
# Switching mode will change subtarget, which we can't do within a bundle
.text
diff --git a/llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s b/llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
index 2f716544b154..65ee2d5b9f38 100644
--- a/llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/lock-without-bundle-mode-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# .bundle_lock can't come without a .bundle_align_mode before it
diff --git a/llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s b/llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
index a5812fd28ab1..6ea3c36beb1c 100644
--- a/llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/switch-section-locked-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# This test invokes .bundle_lock and then switches to a
diff erent section
# w/o the appropriate unlock.
diff --git a/llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s b/llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
index a73f19ea4836..811ef95a451d 100644
--- a/llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
+++ b/llvm/test/MC/X86/AlignedBundling/unlock-without-lock-error.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - 2>&1 | FileCheck %s
# .bundle_unlock can't come without a .bundle_lock before it
diff --git a/llvm/test/MC/X86/check-end-of-data-region.s b/llvm/test/MC/X86/check-end-of-data-region.s
index 3f7d9b617ef6..50f5dab73d35 100644
--- a/llvm/test/MC/X86/check-end-of-data-region.s
+++ b/llvm/test/MC/X86/check-end-of-data-region.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: not --crash llvm-mc -triple=x86_64-apple-darwin -filetype=obj -o /dev/null %s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
.align 4
.data_region jt32
diff --git a/llvm/test/MC/X86/encoder-fail.s b/llvm/test/MC/X86/encoder-fail.s
index 3e845fe7561b..d8d321fa8a1a 100644
--- a/llvm/test/MC/X86/encoder-fail.s
+++ b/llvm/test/MC/X86/encoder-fail.s
@@ -1,3 +1,3 @@
-// RUN: not llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s
+// RUN: not --crash llvm-mc -triple x86_64-unknown-unknown --show-encoding %s 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Cannot encode high byte register in REX-prefixed instruction
movzx %dh, %rsi
diff --git a/llvm/test/MC/X86/invalid-sleb.s b/llvm/test/MC/X86/invalid-sleb.s
index ad27444d608f..7d7df351ce4e 100644
--- a/llvm/test/MC/X86/invalid-sleb.s
+++ b/llvm/test/MC/X86/invalid-sleb.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s
+// RUN: not --crash llvm-mc -filetype=obj -triple x86_64-pc-linux %s -o %t 2>&1 | FileCheck %s
// CHECK: sleb128 and uleb128 expressions must be absolute
diff --git a/llvm/test/MC/X86/reloc-bss.s b/llvm/test/MC/X86/reloc-bss.s
index 3cf26d8b28e5..6463b866f095 100644
--- a/llvm/test/MC/X86/reloc-bss.s
+++ b/llvm/test/MC/X86/reloc-bss.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s
+# RUN: not --crash llvm-mc -filetype=obj -triple=x86_64-linux-gnu %s 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: cannot have fixups in virtual section!
.section .init_array,"awT", at nobits
diff --git a/llvm/test/MachineVerifier/live-ins-01.mir b/llvm/test/MachineVerifier/live-ins-01.mir
index 51c05dacf055..5d6d2fa399e7 100644
--- a/llvm/test/MachineVerifier/live-ins-01.mir
+++ b/llvm/test/MachineVerifier/live-ins-01.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in
diff --git a/llvm/test/MachineVerifier/live-ins-02.mir b/llvm/test/MachineVerifier/live-ins-02.mir
index d76325cdd108..2cc63ac0cd21 100644
--- a/llvm/test/MachineVerifier/live-ins-02.mir
+++ b/llvm/test/MachineVerifier/live-ins-02.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in
diff --git a/llvm/test/MachineVerifier/live-ins-03.mir b/llvm/test/MachineVerifier/live-ins-03.mir
index b5345ccdc3b6..ae640c439d3e 100644
--- a/llvm/test/MachineVerifier/live-ins-03.mir
+++ b/llvm/test/MachineVerifier/live-ins-03.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
# REQUIRES: systemz-registered-target
# Test that a the machine verifier reports an error when a register in
diff --git a/llvm/test/MachineVerifier/test_copy.mir b/llvm/test/MachineVerifier/test_copy.mir
index e234f45287ef..64c2761e7ea7 100644
--- a/llvm/test/MachineVerifier/test_copy.mir
+++ b/llvm/test/MachineVerifier/test_copy.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
--- |
; ModuleID = 'test.ll'
diff --git a/llvm/test/MachineVerifier/test_copy_mismatch_types.mir b/llvm/test/MachineVerifier/test_copy_mismatch_types.mir
index 905977938d51..3b7e54e0c1c4 100644
--- a/llvm/test/MachineVerifier/test_copy_mismatch_types.mir
+++ b/llvm/test/MachineVerifier/test_copy_mismatch_types.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
--- |
; ModuleID = 'test.ll'
diff --git a/llvm/test/MachineVerifier/test_g_add.mir b/llvm/test/MachineVerifier/test_g_add.mir
index 9cd990bb8cc1..331f4bf351ab 100644
--- a/llvm/test/MachineVerifier/test_g_add.mir
+++ b/llvm/test/MachineVerifier/test_g_add.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -march=aarch64 -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_addrspacecast.mir b/llvm/test/MachineVerifier/test_g_addrspacecast.mir
index 88b411378792..fb71057c585c 100644
--- a/llvm/test/MachineVerifier/test_g_addrspacecast.mir
+++ b/llvm/test/MachineVerifier/test_g_addrspacecast.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_bitcast.mir b/llvm/test/MachineVerifier/test_g_bitcast.mir
index 3446d5fc86eb..a399c859404f 100644
--- a/llvm/test/MachineVerifier/test_g_bitcast.mir
+++ b/llvm/test/MachineVerifier/test_g_bitcast.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, amdgpu-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_brjt.mir b/llvm/test/MachineVerifier/test_g_brjt.mir
index e05dd5fadbc2..7a8417efab85 100644
--- a/llvm/test/MachineVerifier/test_g_brjt.mir
+++ b/llvm/test/MachineVerifier/test_g_brjt.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_build_vector.mir b/llvm/test/MachineVerifier/test_g_build_vector.mir
index 77b5beb2fdd8..0c013dfa4778 100644
--- a/llvm/test/MachineVerifier/test_g_build_vector.mir
+++ b/llvm/test/MachineVerifier/test_g_build_vector.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
name: g_build_vector
diff --git a/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir b/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
index d73e37e1e6e3..296713fce9fe 100644
--- a/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
+++ b/llvm/test/MachineVerifier/test_g_build_vector_trunc.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/MachineVerifier/test_g_concat_vectors.mir b/llvm/test/MachineVerifier/test_g_concat_vectors.mir
index 640c4a4ceedb..53e2eca00808 100644
--- a/llvm/test/MachineVerifier/test_g_concat_vectors.mir
+++ b/llvm/test/MachineVerifier/test_g_concat_vectors.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/MachineVerifier/test_g_constant.mir b/llvm/test/MachineVerifier/test_g_constant.mir
index fa5daff870b0..cfdcae929ce1 100644
--- a/llvm/test/MachineVerifier/test_g_constant.mir
+++ b/llvm/test/MachineVerifier/test_g_constant.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir b/llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
index e798f23e789c..51c74e5992d2 100644
--- a/llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
+++ b/llvm/test/MachineVerifier/test_g_dyn_stackalloc.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_extract.mir b/llvm/test/MachineVerifier/test_g_extract.mir
index 62064ae80217..2f326cb56ccf 100644
--- a/llvm/test/MachineVerifier/test_g_extract.mir
+++ b/llvm/test/MachineVerifier/test_g_extract.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_fcmp.mir b/llvm/test/MachineVerifier/test_g_fcmp.mir
index c7416d47dcd4..15373f8ff387 100644
--- a/llvm/test/MachineVerifier/test_g_fcmp.mir
+++ b/llvm/test/MachineVerifier/test_g_fcmp.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_fconstant.mir b/llvm/test/MachineVerifier/test_g_fconstant.mir
index d917d9c846ff..249a74a50157 100644
--- a/llvm/test/MachineVerifier/test_g_fconstant.mir
+++ b/llvm/test/MachineVerifier/test_g_fconstant.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_icmp.mir b/llvm/test/MachineVerifier/test_g_icmp.mir
index 9582a1795123..74448e736fd6 100644
--- a/llvm/test/MachineVerifier/test_g_icmp.mir
+++ b/llvm/test/MachineVerifier/test_g_icmp.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_insert.mir b/llvm/test/MachineVerifier/test_g_insert.mir
index 0785370ec174..d12a2206c6c4 100644
--- a/llvm/test/MachineVerifier/test_g_insert.mir
+++ b/llvm/test/MachineVerifier/test_g_insert.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic.mir b/llvm/test/MachineVerifier/test_g_intrinsic.mir
index 157edc09b801..aac733a3bdf6 100644
--- a/llvm/test/MachineVerifier/test_g_intrinsic.mir
+++ b/llvm/test/MachineVerifier/test_g_intrinsic.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir b/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
index 8e8627d2e723..75e4e623c3e1 100644
--- a/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
+++ b/llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=amdgcn -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_inttoptr.mir b/llvm/test/MachineVerifier/test_g_inttoptr.mir
index 2769c66c8cc7..d0d356a1d7b6 100644
--- a/llvm/test/MachineVerifier/test_g_inttoptr.mir
+++ b/llvm/test/MachineVerifier/test_g_inttoptr.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_jump_table.mir b/llvm/test/MachineVerifier/test_g_jump_table.mir
index 406edcbea5c2..3c837c295140 100644
--- a/llvm/test/MachineVerifier/test_g_jump_table.mir
+++ b/llvm/test/MachineVerifier/test_g_jump_table.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=aarch64 -o /dev/null -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_load.mir b/llvm/test/MachineVerifier/test_g_load.mir
index 18a7718b71b7..ac28b513c1d8 100644
--- a/llvm/test/MachineVerifier/test_g_load.mir
+++ b/llvm/test/MachineVerifier/test_g_load.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_merge_values.mir b/llvm/test/MachineVerifier/test_g_merge_values.mir
index 4829e8f13173..21b4079b5e1f 100644
--- a/llvm/test/MachineVerifier/test_g_merge_values.mir
+++ b/llvm/test/MachineVerifier/test_g_merge_values.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
name: g_merge_values
diff --git a/llvm/test/MachineVerifier/test_g_phi.mir b/llvm/test/MachineVerifier/test_g_phi.mir
index c108ea613543..11e18e2220ad 100644
--- a/llvm/test/MachineVerifier/test_g_phi.mir
+++ b/llvm/test/MachineVerifier/test_g_phi.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
--- |
; ModuleID = 'test.ll'
diff --git a/llvm/test/MachineVerifier/test_g_ptr_add.mir b/llvm/test/MachineVerifier/test_g_ptr_add.mir
index fd60a08e99c7..9a918d2fc7f9 100644
--- a/llvm/test/MachineVerifier/test_g_ptr_add.mir
+++ b/llvm/test/MachineVerifier/test_g_ptr_add.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_ptrtoint.mir b/llvm/test/MachineVerifier/test_g_ptrtoint.mir
index c9a50bbded71..f289a3d1dbed 100644
--- a/llvm/test/MachineVerifier/test_g_ptrtoint.mir
+++ b/llvm/test/MachineVerifier/test_g_ptrtoint.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_select.mir b/llvm/test/MachineVerifier/test_g_select.mir
index d40b276c9ba2..ca0a94d6bc97 100644
--- a/llvm/test/MachineVerifier/test_g_select.mir
+++ b/llvm/test/MachineVerifier/test_g_select.mir
@@ -1,4 +1,4 @@
-#RUN: not llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
+#RUN: not --crash llc -march=aarch64 -run-pass=none -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_sext_inreg.mir b/llvm/test/MachineVerifier/test_g_sext_inreg.mir
index 32573cc9e0ce..120f9995d87d 100644
--- a/llvm/test/MachineVerifier/test_g_sext_inreg.mir
+++ b/llvm/test/MachineVerifier/test_g_sext_inreg.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
--- |
diff --git a/llvm/test/MachineVerifier/test_g_sextload.mir b/llvm/test/MachineVerifier/test_g_sextload.mir
index ee822ea1104b..f12fe1cb6bf0 100644
--- a/llvm/test/MachineVerifier/test_g_sextload.mir
+++ b/llvm/test/MachineVerifier/test_g_sextload.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_shuffle_vector.mir b/llvm/test/MachineVerifier/test_g_shuffle_vector.mir
index 7e07fa9d4fca..740293e79247 100644
--- a/llvm/test/MachineVerifier/test_g_shuffle_vector.mir
+++ b/llvm/test/MachineVerifier/test_g_shuffle_vector.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
name: g_shuffle_vector
diff --git a/llvm/test/MachineVerifier/test_g_store.mir b/llvm/test/MachineVerifier/test_g_store.mir
index bb82042d6691..183935f052df 100644
--- a/llvm/test/MachineVerifier/test_g_store.mir
+++ b/llvm/test/MachineVerifier/test_g_store.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_trunc.mir b/llvm/test/MachineVerifier/test_g_trunc.mir
index fd97b09af15c..9dbeab2c6039 100644
--- a/llvm/test/MachineVerifier/test_g_trunc.mir
+++ b/llvm/test/MachineVerifier/test_g_trunc.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_g_zextload.mir b/llvm/test/MachineVerifier/test_g_zextload.mir
index bcb96e3875f9..3b65bf9c1726 100644
--- a/llvm/test/MachineVerifier/test_g_zextload.mir
+++ b/llvm/test/MachineVerifier/test_g_zextload.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=arm64 -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: global-isel, aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_memccpy_intrinsics.mir b/llvm/test/MachineVerifier/test_memccpy_intrinsics.mir
index acdd9dd2b28c..03ba9e0d06f2 100644
--- a/llvm/test/MachineVerifier/test_memccpy_intrinsics.mir
+++ b/llvm/test/MachineVerifier/test_memccpy_intrinsics.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - -march=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
diff --git a/llvm/test/MachineVerifier/test_phis_precede_nonphis.mir b/llvm/test/MachineVerifier/test_phis_precede_nonphis.mir
index fa69b40fddf1..0253e6ab952c 100644
--- a/llvm/test/MachineVerifier/test_phis_precede_nonphis.mir
+++ b/llvm/test/MachineVerifier/test_phis_precede_nonphis.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llc -run-pass=machineverifier %s -o - 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
--- |
diff --git a/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir b/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
index 8390d9bf3ce1..38cf1859e6d1 100644
--- a/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-extend-truncate.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
# CHECK: Bad machine code: Generic extend/truncate can not operate on pointers
diff --git a/llvm/test/MachineVerifier/verifier-generic-types-1.mir b/llvm/test/MachineVerifier/verifier-generic-types-1.mir
index bc2d2580ed17..884209f17362 100644
--- a/llvm/test/MachineVerifier/verifier-generic-types-1.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-types-1.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
# CHECK-NOT: Type mismatch
diff --git a/llvm/test/MachineVerifier/verifier-generic-types-2.mir b/llvm/test/MachineVerifier/verifier-generic-types-2.mir
index 27a14c222c6e..5558a2b654ac 100644
--- a/llvm/test/MachineVerifier/verifier-generic-types-2.mir
+++ b/llvm/test/MachineVerifier/verifier-generic-types-2.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
# CHECK: Bad machine code: Generic instruction is missing a virtual register type
diff --git a/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir b/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
index fb4777898edd..a723ee205ef0 100644
--- a/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
+++ b/llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
+# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck -check-prefix=ERROR %s
# REQUIRES: amdgpu-registered-target
# When the verifier was detecting the invalid liveness for vcc, it would assert when trying to iterate the subregisters of the implicit virtual register use.
diff --git a/llvm/test/MachineVerifier/verifier-phi-fail0.mir b/llvm/test/MachineVerifier/verifier-phi-fail0.mir
index 80a50b50937c..aa488f064cc6 100644
--- a/llvm/test/MachineVerifier/verifier-phi-fail0.mir
+++ b/llvm/test/MachineVerifier/verifier-phi-fail0.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
---
diff --git a/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir b/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
index 831ca83baa28..6e9ec9c0887f 100644
--- a/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
+++ b/llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -march=amdgcn -run-pass=verify -o - %s 2>&1 | FileCheck %s
# REQUIRES: amdgpu-registered-target
# Make sure that mismatched successors are caught when a _term
diff --git a/llvm/test/MachineVerifier/verify-regbankselected.mir b/llvm/test/MachineVerifier/verify-regbankselected.mir
index 027fc6664573..ed022ed5eaf9 100644
--- a/llvm/test/MachineVerifier/verify-regbankselected.mir
+++ b/llvm/test/MachineVerifier/verify-regbankselected.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
--- |
diff --git a/llvm/test/MachineVerifier/verify-regops.mir b/llvm/test/MachineVerifier/verify-regops.mir
index 9219586ffc03..ec17c3d0558b 100644
--- a/llvm/test/MachineVerifier/verify-regops.mir
+++ b/llvm/test/MachineVerifier/verify-regops.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \
+# RUN: not --crash llc -march=x86 -o - %s -run-pass=none -verify-machineinstrs \
# RUN: 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
#
diff --git a/llvm/test/MachineVerifier/verify-selected.mir b/llvm/test/MachineVerifier/verify-selected.mir
index a38f67ca6e67..b14f977caf14 100644
--- a/llvm/test/MachineVerifier/verify-selected.mir
+++ b/llvm/test/MachineVerifier/verify-selected.mir
@@ -1,4 +1,4 @@
-# RUN: not llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -verify-machineinstrs -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
--- |
diff --git a/llvm/test/Object/coff-invalid.test b/llvm/test/Object/coff-invalid.test
index 3ab3f41b15fe..da5d687c6e20 100644
--- a/llvm/test/Object/coff-invalid.test
+++ b/llvm/test/Object/coff-invalid.test
@@ -7,7 +7,7 @@ SECTIONS-NEXT: Name: .text (2E 74 65 78 74 00 00 00)
SECTIONS-NEXT: VirtualSize: 0x0
SECTIONS-NEXT: VirtualAddress: 0x1000000
-RUN: not llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \
+RUN: not --crash llvm-readobj -r %p/Inputs/invalid-bad-section-address.coff 2>&1 | \
RUN: FileCheck %s
CHECK: Sections with relocations should have an address of 0
diff --git a/llvm/test/Object/elf-invalid-phdr.test b/llvm/test/Object/elf-invalid-phdr.test
index b779171dfbb3..68a26788e118 100644
--- a/llvm/test/Object/elf-invalid-phdr.test
+++ b/llvm/test/Object/elf-invalid-phdr.test
@@ -20,7 +20,7 @@
# - Section: .text
#
# Then editing the e_phoff in with a hexeditor to set it to 0xffffff
-RUN: not llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \
+RUN: not --crash llvm-objdump -private-headers %p/Inputs/invalid-phdr.elf 2>&1 \
RUN: | FileCheck %s
-CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56
\ No newline at end of file
+CHECK: LLVM ERROR: program headers are longer than binary of size 4162: e_phoff = 0xffffff, e_phnum = 1, e_phentsize = 56
diff --git a/llvm/test/Object/invalid.test b/llvm/test/Object/invalid.test
index 4d19b66238cc..442d38d46d06 100644
--- a/llvm/test/Object/invalid.test
+++ b/llvm/test/Object/invalid.test
@@ -47,7 +47,7 @@ Sections:
## when instead of expected SHT_RELA section it locates a section of a
diff erent type.
# RUN: yaml2obj %s --docnum=3 -o %t3
-# RUN: not llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s
+# RUN: not --crash llvm-dwarfdump -debug-line %t3 2>&1 | FileCheck --check-prefix=RELA %s
# RELA: LLVM ERROR: Section is not SHT_RELA
diff --git a/llvm/test/Object/wasm-invalid-file.yaml b/llvm/test/Object/wasm-invalid-file.yaml
index 5ea192d66177..9870b47ee85c 100644
--- a/llvm/test/Object/wasm-invalid-file.yaml
+++ b/llvm/test/Object/wasm-invalid-file.yaml
@@ -1,7 +1,7 @@
# RUN: yaml2obj %s -o %t.wasm
# RUN: echo -e -n "\x01" >> %t.wasm
# Append a new section but truncate the encoding of the section size
-# RUN: not llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE
+# RUN: not --crash llvm-objdump -h %t.wasm 2>&1 | FileCheck %s -check-prefix=CHECK-LEB-DECODE
!WASM
FileHeader:
diff --git a/llvm/test/Object/wasm-string-outside-section.test b/llvm/test/Object/wasm-string-outside-section.test
index 5f618228dc96..3fa6217bae8e 100644
--- a/llvm/test/Object/wasm-string-outside-section.test
+++ b/llvm/test/Object/wasm-string-outside-section.test
@@ -1,3 +1,3 @@
-RUN: not llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s
+RUN: not --crash llvm-objdump -s %p/Inputs/WASM/string-outside-section.wasm 2>&1 | FileCheck %s
CHECK: LLVM ERROR: EOF while reading string
diff --git a/llvm/test/Other/close-stderr.ll b/llvm/test/Other/close-stderr.ll
deleted file mode 100644
index b310bc2c0424..000000000000
--- a/llvm/test/Other/close-stderr.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: sh -c 'opt --reject-this-option 2>&-; echo $?; opt -o /dev/null /dev/null 2>&-; echo $?;' \
-; RUN: | FileCheck %s
-
-; CHECK: {{^1$}}
-; On valgrind, we got 127 here.
-; XFAIL: valgrind
-
-; CHECK: {{^0$}}
-; XFAIL: vg_leak
-; REQUIRES: shell
-
-; Test that the error handling when writing to stderr fails exits the
-; program cleanly rather than aborting.
diff --git a/llvm/test/Other/optimization-remarks-inline.ll b/llvm/test/Other/optimization-remarks-inline.ll
index bcd90bc28d32..bc2200545bb0 100644
--- a/llvm/test/Other/optimization-remarks-inline.ll
+++ b/llvm/test/Other/optimization-remarks-inline.ll
@@ -10,7 +10,7 @@
; RUN: opt < %s -inline -pass-remarks='inl' -pass-remarks='vector' -S 2>&1 | FileCheck --check-prefix=REMARKS %s
; RUN: opt < %s -inline -S 2>&1 | FileCheck --check-prefix=REMARKS %s
-; RUN: not opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s
+; RUN: not --crash opt < %s -pass-remarks='(' 2>&1 | FileCheck --check-prefix=BAD-REGEXP %s
define i32 @foo(i32 %x, i32 %y) #0 {
entry:
diff --git a/llvm/test/TableGen/HwModeSelect.td b/llvm/test/TableGen/HwModeSelect.td
index 6480268f3b3d..0c63e140f390 100644
--- a/llvm/test/TableGen/HwModeSelect.td
+++ b/llvm/test/TableGen/HwModeSelect.td
@@ -1,4 +1,4 @@
-// RUN: not llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s
+// RUN: not --crash llvm-tblgen -gen-dag-isel -I %p/../../include %s 2>&1 | FileCheck %s
// The HwModeSelect class is intended to serve as a base class for other
// classes that are then used to select a value based on the HW mode.
diff --git a/llvm/test/Transforms/BlockExtractor/invalid-block.ll b/llvm/test/Transforms/BlockExtractor/invalid-block.ll
index f444764e991d..4b284ddbcdba 100644
--- a/llvm/test/Transforms/BlockExtractor/invalid-block.ll
+++ b/llvm/test/Transforms/BlockExtractor/invalid-block.ll
@@ -1,5 +1,5 @@
; RUN: echo 'bar invalidbb' > %t
-; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
+; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid block
define void @bar() {
diff --git a/llvm/test/Transforms/BlockExtractor/invalid-function.ll b/llvm/test/Transforms/BlockExtractor/invalid-function.ll
index 4044815893e5..9af46ef2dcf9 100644
--- a/llvm/test/Transforms/BlockExtractor/invalid-function.ll
+++ b/llvm/test/Transforms/BlockExtractor/invalid-function.ll
@@ -1,5 +1,5 @@
; RUN: echo 'foo bb' > %t
-; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
+; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid function
define void @bar() {
diff --git a/llvm/test/Transforms/BlockExtractor/invalid-line.ll b/llvm/test/Transforms/BlockExtractor/invalid-line.ll
index 7e409d35916f..f0a4231660d7 100644
--- a/llvm/test/Transforms/BlockExtractor/invalid-line.ll
+++ b/llvm/test/Transforms/BlockExtractor/invalid-line.ll
@@ -1,5 +1,5 @@
; RUN: echo 'foo' > %t
-; RUN: not opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
+; RUN: not --crash opt -S -extract-blocks -extract-blocks-file=%t %s 2>&1 | FileCheck %s
; CHECK: Invalid line
define void @bar() {
diff --git a/llvm/test/Transforms/FunctionImport/not-prevailing.ll b/llvm/test/Transforms/FunctionImport/not-prevailing.ll
index 0e0dd53950ae..043b3a89adc2 100644
--- a/llvm/test/Transforms/FunctionImport/not-prevailing.ll
+++ b/llvm/test/Transforms/FunctionImport/not-prevailing.ll
@@ -1,6 +1,6 @@
; RUN: opt -module-summary %s -o %t1.bc
; RUN: opt -module-summary -o %t2.bc %S/Inputs/not-prevailing.ll
-; RUN: not llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \
+; RUN: not --crash llvm-lto2 run -o %t3.bc %t1.bc %t2.bc -r %t1.bc,bar,px \
; RUN: -r %t1.bc,foo,x -r %t2.bc,foo,x -save-temps 2>&1 | FileCheck %s
; CHECK: Interposable and available_externally/linkonce_odr/weak_odr symbol
diff --git a/llvm/test/Transforms/GCOVProfiling/version.ll b/llvm/test/Transforms/GCOVProfiling/version.ll
index 239c62f4a6bb..c72b64260ffa 100644
--- a/llvm/test/Transforms/GCOVProfiling/version.ll
+++ b/llvm/test/Transforms/GCOVProfiling/version.ll
@@ -4,7 +4,7 @@
; RUN: opt -insert-gcov-profiling -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.204'
; RUN: rm %t/version.gcno
-; RUN: not opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
+; RUN: not --crash opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
; RUN: opt -insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.704'
; RUN: rm %t/version.gcno
@@ -12,7 +12,7 @@
; RUN: opt -passes=insert-gcov-profiling -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.204'
; RUN: rm %t/version.gcno
-; RUN: not opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
+; RUN: not --crash opt -passes=insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t/2
; RUN: opt -passes=insert-gcov-profiling -default-gcov-version=407* -disable-output < %t/2
; RUN: head -c8 %t/version.gcno | grep '^oncg.704'
; RUN: rm %t/version.gcno
diff --git a/llvm/test/Transforms/InstCombine/limit-max-iterations.ll b/llvm/test/Transforms/InstCombine/limit-max-iterations.ll
index a2ef4ebcbb50..af027998edac 100644
--- a/llvm/test/Transforms/InstCombine/limit-max-iterations.ll
+++ b/llvm/test/Transforms/InstCombine/limit-max-iterations.ll
@@ -2,7 +2,7 @@
; RUN: opt < %s -instcombine --instcombine-max-iterations=0 -S | FileCheck %s --check-prefix=ZERO
; RUN: opt < %s -instcombine --instcombine-max-iterations=1 -S | FileCheck %s --check-prefix=ONE
; RUN: opt < %s -instcombine -S | FileCheck %s --check-prefix=FIXPOINT
-; RUN: not opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP
+; RUN: not --crash opt < %s -instcombine -S --instcombine-infinite-loop-threshold=3 2>&1 | FileCheck %s --check-prefix=LOOP
; Based on xor-of-icmps-with-extra-uses.ll. This requires multiple iterations of
; InstCombine to reach a fixpoint.
diff --git a/llvm/test/tools/llvm-lto2/X86/pipeline.ll b/llvm/test/tools/llvm-lto2/X86/pipeline.ll
index f9759b590857..abc2f20a0725 100644
--- a/llvm/test/tools/llvm-lto2/X86/pipeline.ll
+++ b/llvm/test/tools/llvm-lto2/X86/pipeline.ll
@@ -28,13 +28,13 @@ define void @patatino() {
; CUSTOM-NEXT: }
; Check that invalid pipelines are caught as errors.
-; RUN: not llvm-lto2 run %t1.bc -o %t.o \
+; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \
; RUN: -r %t1.bc,patatino,px -opt-pipeline foogoo 2>&1 | \
; RUN: FileCheck %s --check-prefix=ERR
; ERR: LLVM ERROR: unable to parse pass pipeline description 'foogoo': unknown pass name 'foogoo'
-; RUN: not llvm-lto2 run %t1.bc -o %t.o \
+; RUN: not --crash llvm-lto2 run %t1.bc -o %t.o \
; RUN: -r %t1.bc,patatino,px -aa-pipeline patatino \
; RUN: -opt-pipeline loweratomic 2>&1 | \
; RUN: FileCheck %s --check-prefix=AAERR
diff --git a/llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s b/llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
index a1b53980936d..50b5fab93513 100644
--- a/llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
+++ b/llvm/test/tools/llvm-readobj/COFF/arm64-many-epilogs.s
@@ -1,6 +1,6 @@
// REQUIRES: aarch64-registered-target
// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
-// RUN: | not llvm-readobj --unwind - | FileCheck %s
+// RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s
// Older versions of LLVM had a bug where we would accidentally
// truncate the number of epilogue scopes to a uint8_t; make
diff --git a/llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s b/llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
index 74a61dd02019..5256de05cb24 100644
--- a/llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
+++ b/llvm/test/tools/llvm-readobj/COFF/arm64-win-error2.s
@@ -6,7 +6,7 @@
// REQUIRES: aarch64-registered-target
// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
-// RUN: | not llvm-readobj --unwind - 2>&1 | FileCheck %s
+// RUN: | not --crash llvm-readobj --unwind - 2>&1 | FileCheck %s
// CHECK: LLVM ERROR: Malformed unwind data
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